74HCT7403D,512 NXP Semiconductors, 74HCT7403D,512 Datasheet - Page 16

• Manufacturer Part Number: 74HCT7403D,512
• Description: IC FIFO REGISTER 64X4 3ST 16SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT7403D,512

• Function: Asynchronous, Synchronous
• Memory Size: 256 (64 x 4)
• Data Rate: 15MHz
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Logic Family: HCT
• Logical Function: FIFO Register
• Number Of Elements: 1
• Number Of Bits: 4
• Number Of Inputs: 4
• Number Of Outputs: 4
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Output Type: 3-State
• Polarity: Non-Inverting
• Technology: CMOS
• Mounting: Surface Mount
• Pin Count: 16
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Quiescent Current: 50uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Access Time: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 74HCT7403D; 74HCT7403D; 933999390512

Philips Semiconductors
With FIFO empty; SO is held HIGH in anticipation
Notes to Fig.10
1. FIFO is initially empty, SO is held HIGH
2. SI pulse; loads data into FIFO and initiates ripple through process
3. DOR flag signals the arrival of valid data at the output stage
4. Output transition; data arrives at output stage after the specified propagation delay between the rising edge of the
5. DOR goes LOW; data shift-out is complete, FIFO is empty again
6. SO set LOW; necessary to complete shift-out process. DOR remains LOW, because FIFO is empty.
September 1993
handbook, full pagewidth
4-Bit x 64-word FIFO register; 3-state
(1) HC : V
Fig.10 Waveforms showing ripple through delay SI input to DOR output, DOR output pulse width and propagation
DOR pulse to the Q
HCT: V
delay from the DOR pulse to the Q
M
M
= 50%; V
= 1.3 V; V
I
= GND to V
I
= GND to 3 V.
n
SI INPUT
SO INPUT
Q OUTPUT
DOR OUTPUT
output
n
CC
.
1
V M
(1)
n
output.
2
V M
(1)
ripple through
16
delay
t PLH
3
V M
(1)
4
t W
t PHL
t PLH
5
MGA658
6
74HC/HCT7403
Product specification