74HCT7403D,512 NXP Semiconductors, 74HCT7403D,512 Datasheet - Page 2

IC FIFO REGISTER 64X4 3ST 16SOIC

74HCT7403D,512

Manufacturer Part Number
74HCT7403D,512
Description
IC FIFO REGISTER 64X4 3ST 16SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT7403D,512

Function
Asynchronous, Synchronous
Memory Size
256 (64 x 4)
Data Rate
15MHz
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Logic Family
HCT
Logical Function
FIFO Register
Number Of Elements
1
Number Of Bits
4
Number Of Inputs
4
Number Of Outputs
4
High Level Output Current
-8mA
Low Level Output Current
8mA
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Output Type
3-State
Polarity
Non-Inverting
Technology
CMOS
Mounting
Surface Mount
Pin Count
16
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Quiescent Current
50uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Access Time
-
Lead Free Status / Rohs Status
Compliant
Other names
74HCT7403D
74HCT7403D
933999390512
Philips Semiconductors
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
The 74HC/HCT7403 are high-speed
Si-gate CMOS devices. They are
specified in compliance with JEDEC
standard no.7A.
The “7403” is an expandable, First-In
First-Out (FIFO) memory organized
as 64 words by 4 bits. A guaranteed
15 MHz data-rate makes it ideal for
high-speed applications. A higher
data-rate can be obtained in
applications where the status flags
are not used (burst-mode).
With separate controls for shift-in (SI)
and shift-out (SO), reading and
writing operations are completely
independent, allowing synchronous
and asynchronous data transfers.
Additional controls include a
master-reset input (MR), an output
enable input (OE) and flags. The
data-in-ready (DIR) and
data-out-ready (DOR) flags indicate
the status of the device.
September 1993
Synchronous or asynchronous
operation
3-state outputs
30 MHz (typical) shift-in and
shift-out rates
Readily expandable in word and bit
dimensions
Pinning arranged for easy board
layout: input pins directly opposite
output pins
Output capability: driver (8 mA)
I
High-speed disc or tape controller
Communications buffer.
4-Bit x 64-word FIFO register; 3-state
CC
category: LSI.
QUICK REFERENCE DATA
GND = 0 V; T
Note
1. For HC the condition is V
ORDERING INFORMATION
t
f
C
C
74HC/HCT7403N
74HC/HCT7403D
SYMBOL
PHL
max
TYPE NUMBER
I
PD
For HCT the condition is V
EXTENDED
/t
PLH
propagation delay SO,
SI to DIR and DOR
maximum clock
frequency
input capacitance
power dissipation
capacitance per
package
amb
= 25 C; t
PARAMETER
2
PINS
16
16
r
= t
I
= GND to V
I
f
PIN POSITION
= GND to V
= 6 ns.
SO16L
DIL
C
V
note 1
CONDITIONS
L
CC
= 15 pF;
CC
= 5 V
CC
PACKAGE
.
1.5 V.
MATERIAL
74HC/HCT7403
plastic
plastic
Product specification
15
30
3.5
475
HC
TYP.
17
30
3.5
490
HCT
SOT38Z
SOT162
CODE
ns
MHz
pF
pF
UNIT

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