UPD161622 NEC, UPD161622 Datasheet - Page 27

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UPD161622

Manufacturer Part Number
UPD161622
Description
396 OUTPUT TFT-LCD SOURCE DRIVER
Manufacturer
NEC
Datasheet
www.DataSheet4U.com
5.2.5 High-speed RAM write mode
speed write function, data can be written to the display RAM at an access speed four times faster than that of the
ordinary RAM write function. Therefore, applications, such as motion picture display where the display data must be
rewritten at high speeds, can be supported.
temporarily stored in an internal register of the PD161622.
write the next data to the internal register while the first data is being written to the RAM.
written to the internal register. If data of less than 64 bits is transmitted in the high-speed RAM write mode, this data is
not written to the display RAM. Therefore, CPU data is not reflected on the LCD display even if it is transmitted. In this
case, the data that is not reflected remains stored in the register. When the next data is transmitted, it is written to the
register from where the preceding data is stored. However, if the chip select signal is disserted inactive (/CS = H) in
the middle of data transfer, and then asserted active again and when the display data register (R12) is set, the register
is initialized. Consequently, the data stored in the register is lost.
With the PD161622, two types of access modes can be selected for accessing the display RAM.
The PD161622 has a high-speed RAM write function, as well as an ordinary RAM write function. By using the high-
When the high-speed RAM write mode is selected by using BSTR of the data access control register (R5), data is
When data of 64 bits (16 bits x 4) has been stored in the register, it is written to the display RAM. It is also possible to
In the high-speed RAM write mode, however, the CPU must transmit data in units of 64 bits (4 pixels) have been
It is therefore recommended to transmit display data in 64-bit units when using the high-speed RAM write mode.
Caution Do not specify any value other than the address value 4n n (n = 1 to 33) for the X address (R6) in
Display
the high-speed RAM access mode. The operation is not guaranteed if invalid address data is set.
Data
Figure 5–11. Image of Operation in High-speed Write Mode
Interface circuit
Parallel / Serial
64-bit
8/16
64
8/16
64-bit register
8/16
Data Sheet S15649EJ2V0DS
64
64-bit
64
Display RAM
8/16
64-bit
64
PD161622
27

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