UPD161622 NEC, UPD161622 Datasheet - Page 79

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UPD161622

Manufacturer Part Number
UPD161622
Description
396 OUTPUT TFT-LCD SOURCE DRIVER
Manufacturer
NEC
Datasheet
www.DataSheet4U.com
7. COMMAND
interprets and executes commands only in accordance with the internal timing, without being dependent upon the
external clock. Therefore, the processing speed is extremely high and, usually, no busy check is necessary.
low pulse to the /WR pin when it writes data.
low-pulse signal is input to the R,/W pin. A command is executed if a high-pulse signal is input to the E pin in this
status. Therefore, in the explanation of the commands and display commands after 7.2 Control Register 1 (R0) and
the sections that follow, the M68 system CPU interface uses H, instead of /RD (E), when reading status or display
data. This is how it differs from the i80 system CPU interface.
the serial interface is used, sequentially input data to the PD161622, starting from D
(1) Commands other than those that manipulate display memory register (R12)
(2) Display Memory Register (R12)
The
An i80 system CPU interface inputs a low pulse to the /RD pin when it reads data to issue a command. It inputs a
Data can be read from an M68 system CPU interface if a high-pulse signal is input to the R,/W pin, and written if a
The commands of the PD161622 are explained below, taking an i80 system CPU interface as an example. When
The data bus length to input commands is as follows:
BMD = 1 (8-bit data bus)
BMD = 0 (16-bit data bus)
Note 0 or 1
BMD = 1 (8-bit data bus)
BMD = 0 (16-bit data bus)
DATA
DATA
DATA
DATA
The commands that manipulate the display memory register (R12) are input in 1-byte units when BMD = 1, or in
2-byte units when BMD = 0.
Commands other than those that manipulate the display memory register (R12) are input in one byte unit,
regardless of the value of BMD (control register 2 (R1), bus length setting).
Pin
Pin
Pin
Pin
PD161622 identifies data bus signals by a combination of the RS, /RD (E), and /WR (R,/W) signals. It
Note
D
D
D
D
D
D
D
15
15
15
7
7
7
7
Note
D
D
D
D
D
D
D
14
14
14
6
6
6
6
Note
D
D
D
D
D
D
D
13
13
13
5
5
5
5
Note
D
D
D
D
D
D
D
12
12
12
4
4
4
4
Note
D
D
D
D
D
D
D
11
11
11
3
3
3
3
Note
Data Sheet S15649EJ2V0DS
D
D
D
D
D
D
D
10
10
10
2
2
2
2
Note
D
D
D
D
D
D
D
1
1
9
1
1
9
9
Note
D
D
D
D
D
D
D
0
0
8
0
0
8
8
D
D
D
D
7
7
7
7
D
D
D
D
6
6
6
6
D
D
D
D
5
5
5
5
7
.
D
D
D
D
4
4
4
4
D
D
D
D
3
3
3
3
D
D
D
D
2
2
2
2
PD161622
D
D
D
D
1
1
1
1
D
D
D
D
0
0
0
0
79

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