UPD161622 NEC, UPD161622 Datasheet - Page 9

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UPD161622

Manufacturer Part Number
UPD161622
Description
396 OUTPUT TFT-LCD SOURCE DRIVER
Manufacturer
NEC
Datasheet
www.DataSheet4U.com
D
D
D
D
RS
IP
OP
OP
R
OSC
OSC
CSTB
Symbol
0
8
6
7
SEL
0
(SCL),
(SI)
to D
to D
0
7
to IP
to
IN
OUT
5
15
,
3
,
Data bus
(serial clock)
(serial data input)
Index register/,
data/command selection
Input port
Output port
Oscillation signal select
Oscillation signal
Oscillation signal
GSTB logic signal
Pin Name
50 to 35
54
125, 127,
129, 131
116 to 123
28
32
30
34
Pad No.
Data Sheet S15649EJ2V0DS
Output
Output
Output
Input
Input
Input
Input
I/O
I/O
These pins comprise 16-bit bi-directional data.
When the serial interface has been selected (PSX = L), D
a serial data input pin (SI), D
In either case, pins D
When the chip is not selected, D
When parallel data transfer has been selected, this pin is usually
connected to the least significant bit of the standard CPU address bus
and is used to distinguish between data from index registers and
data/commands.
RS = H: Indicates that data from D
RS = L: Indicates that data from D
Also, when serial data transfer is selected, the level of the RS pin is
fetched at the rising edge of the eighth clock of the serial clock and
whether the data is index register contents or data/command is
distinguished.
RS = H: Indicates that the data input to SI is data/command.
RS = L: Indicates that the data input to SI is index register contents.
This is a general-purpose input port. The status of these pins (H or L)
can be read via a command.
Because this is a CMOS input, do not leave open.
This is a general-purpose output port. The status of these pins (H or L)
can be write via a command.
Leave open when in unused.
This pin is for oscillation signal selection. When in used external
resistance connection oscillator circuit, this pin set H. When in used
internal oscillator circuit, this pin set L.
R
R
This pin is for oscillation signal input.
R
R
This pin is for oscillation signal input.
R
R
This pin outputs STB signal for gate driver leveled by interface power
supply voltage (V
SEL
SEL
SEL
SEL
SEL
SEL
= H: External resistance connection oscillator circuit select
= L: CR internal oscillator circuit select
= H: Connect 51 k resistance between OSC
= L: Leave open
= H: Connect 51 k resistance between OSC
= L: Leave open
CC2
). This output signal is reverse signal of GSTB.
0
to D
7
and D
6
functions as a serial clock input pin (SCL).
Function
0
to D
0
8
0
to D
to D
to D
15
15
7
are in high impedance mode.
15
is index register contents
are in high impedance mode.
is data/command
IN
IN
PD161622
and OSC
and OSC
7
functions as
OUT
OUT
.
.
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