LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 94

• Manufacturer Part Number: LM3S101-CRN20-XNPT
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

8.1
8.2
March 22, 2006
Block Diagram
Figure 8-1.
Functional Description
Important:
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 8-2).
The LM3S101 microcontroller contains three of these physical GPIO blocks.
All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the
exception of the five JTAG pins (PB7 and PC[3:0]. The JTAG pins default to their
JTAG functionality (GPIOAFSEL=1). Asserting a Power-On-Reset (POR) or an
external reset (RST) puts both groups of pins back to their default state.
GPIO Module Block Diagram
PA0
PA1
PA2
PA3
PA4
PA5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
Preliminary
U0Rx
U0Tx
SSIClk
SSIFss
CCP0
32KHz
C0-
C0o/C1-
C0+
SSIRx
SSITx
TCK/SWCLK
TMS/SWDIO
TDI
TDO/SWO
UART0
Comparators
SSI
Timer 0
Timer 1
JTAG
Analog
TRST
LM3S101 Data Sheet
94