EM636327Q-7 Etron Technology Inc., EM636327Q-7 Datasheet - Page 16

• Manufacturer Part Number: EM636327Q-7
• Description: 512K x 32 High Speed Synchronous Graphics DRAM(SGRAM)
• Manufacturer: Etron Technology Inc.

Preliminary
12 Special Mode Register Set command
13 No-Operation command
(RAS# = "L", CAS# = "L", WE# = "L", DSF = "H", BS, A0-A9 = Register Data)
Write and masked Write cycles. The control information being written to the Special Mode register
is applied to the address inputs and the data to be written to either the Color register or the Mask
register is applied to the DQs. When A6 is "HIGH" during a Special Mode Register Set cycle, the
Color register will be loaded with the data on the DQs. Similarly, when A5 is "HIGH" during a
Special Mode Register Set cycle, the Mask register will be loaded with the data on the DQs.
A6=A5=1 in the Special Mode Register Set cycle is illegal.
can be issued during the active state. As in a write operation, this command accepts the data
needed through DQ pins. Therefore, it should be attended not to induce bus contention.
(RAS# = "H", CAS# = "H", WE# = "H")
is Low). This prevents unwanted commands from being registered during idle or wait states.
Load Mask Register
Load Color Register
Leave Unchanged
The special mode register is used to load the Color and Mask registers, which are used in Block
One clock cycle is required to complete the write in the Special Mode register. This command
The No-Operation command is used to perform a NOP to the SGRAM which is selected (CS#
Functions
Illegal
This field specifies the number of clock cycles from the assertion of the Read command to
the first read data. The minimum whole value of CAS# Latency depends on the frequency
of CLK. The minimum whole value satisfying the following formula must be programmed
into this field.
Test Mode field (A9~A7)
These two bits are used to enter the test mode and must be programmed to "00" in normal
operation.
Single Write Mode (BS)
This bit is used to select the write mode. When the BS bit is "0", the Burst-Read-Burst-
Write mode is selected. When the BS bit is "1", the Burst-Read-Single-Write mode is
selected.
A9
X
X
X
BS
0
1
A6
0
0
0
0
1
A8
0
0
1
Burst-Read-Single-Write
Burst-Read-Burst-Write
BS
Single Write Mode
X
X
X
X
A7
A5
X
X
0
1
0
0
1
1
t
CAC
A9 ~ A7
(min) ¡Ø CAS# Latency X t
Vendor Use Only
Vendor Use Only
X
X
X
X
normal mode
Test Mode
A4
X
0
1
0
1
16
A6
0
0
1
1
CAS# Latency
Reserved
Reserved
2 clocks
3 clocks
1 clock
A5
0
1
0
1
A4 ~ A0
CK
X
X
X
X
EM636327
December
1998