EM636327Q-7 Etron Technology Inc., EM636327Q-7 Datasheet - Page 23
EM636327Q-7
Manufacturer Part Number
EM636327Q-7
Description
512K x 32 High Speed Synchronous Graphics DRAM(SGRAM)
Manufacturer
Etron Technology Inc.
Datasheet
1.EM636327Q-7.pdf
(78 pages)
- Current page: 23 of 78
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12. Power up Sequence
Preliminary
Power up must be performed in the following sequence.
1) Power must be applied to V
2) After power-up, a pause of 200 seconds minimum is required. Then, it is recommended that DQM
3) Both banks must be precharged.
4) Mode Register Set command must be asserted to initialize the Mode register.
5) A minimum of 2 Auto-Refresh dummy cycles must be required to stabilize the internal circuitry of
and both CKE = "H" and DQM = "H." The CLK signals must be started at the same time.
is held "HIGH" (V
the device.
DD
levels) to ensure DQ output is in high impedance.
DD
and V
DDQ
(simultaneously) when all input signals are held "NOP" state
23
EM636327
December
1998
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