IDT72V3652L10PF IDT, Integrated Device Technology Inc, IDT72V3652L10PF Datasheet - Page 8

• Manufacturer Part Number: IDT72V3652L10PF
• Description: IC BI FIFO 4096X36 10NS 120QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V3652L10PF

• Function: Asynchronous, Synchronous
• Memory Size: 147K (4K x 36)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V3652L10PF

NOTES:
1. For 10ns speed grade: Vcc = 3.3V ± 0.15V; T
2. Requirement to count the clock edge as one of at least four needed to reset a FIFO.
3. Skew time is not a timing constraint for proper device operation and is only included to illustrate the timing relationship between CLKA cycle and CLKB cycle.
4. Design simulated, not tested.
TIMING REQUIREMENTS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING FREE-AIR TEMPERATURE
(For 10ns speed grade only: Vcc = 3.3V
IDT72V3652/72V3662/72V3672 3.3V CMOS SyncBiFIFO
2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
S
DS
DH
CLK
CLKH
CLKL
ENS1
ENS2
RSTS
FSS
FWS
ENH
RSTH
FSH
SKEW1
SKEW2
Symbol
(3)
(3,4)
Clock Frequency, CLKA or CLKB
Clock Cycle Time, CLKA or CLKB
Pulse Duration, CLKA or CLKB HIGH
Pulse Duration, CLKA and CLKB LOW
Setup Time, A0-A35 before CLKA↑ and B0-B35
before CLKB↑
Setup Time, CSA and W/RA, before
CLKA↑; CSB, and W/RB before CLKB↑
Setup Time, ENA and MBA, before
CLKA↑; ENB, and MBB before CLKB↑
Setup Time, RST1 or RST2 LOW before CLKA↑
or CLKB↑
Setup Time, FS0 and FS1 before RST1 and RST2 HIGH
Setup Time, FWFT before CLKA↑
Hold Time, A0-A35 after CLKA↑ and B0-B35 after CLKB↑
Hold Time, CSA, W/RA, ENA, and MBA after CLKA↑;
CSB, W/RB, ENB, and MBB after CLKB↑
Hold Time, RST1 or RST2 LOW after CLKA↑ or CLKB↑
Hold Time, FS0 and FS1 after RST1 and RST2 HIGH
Skew Time, between CLKA↑ and CLKB↑ for EFA/ORA,
EFB/ORB, FFA/IRA, and FFB/IRB
Skew Time, between CLKA↑ and CLKB↑ for AEA,
AEB, AFA, and AFB
(2)
Parameter
±
A
0.15V
= 0° to +70°.
;
T
A
= 0°C to +70°C; JEDEC JESD8-A compliant)
TM
(2)
8
Min.
IDT72V3652L10
IDT72V3662L10
IDT72V3672L10
4.5
4.5
7.5
0.5
0.5
7.5
—
10
12
3
4
3
5
0
4
2
Max.
100
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(1)
(1)
COMMERCIAL TEMPERATURE RANGE
4.5
4.5
7.5
7.5
Min.
—
15
12
IDT72V3652L15
IDT72V3662L15
IDT72V3672L15
6
6
4
5
0
1
1
4
2
FEBRUARY 4, 2009
66.7
Max.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns