LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 486
LM3S5632
Manufacturer Part Number
LM3S5632
Description
Lm3s5632 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5632.pdf
(685 pages)
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Reset
Reset
Type
Type
Inter-Integrated Circuit (I
I2C Slave Raw Interrupt Status (I2CSRIS)
I2C Slave 0 base: 0x4002.0800
I2C Slave 1 base: 0x4002.1800
Offset 0x010
Type RO, reset 0x0000.0000
486
Bit/Field
31:3
RO
RO
2
1
0
31
15
0
0
RO
RO
Register 14: I
This register specifies whether an interrupt is pending.
30
14
0
0
STARTRIS
RO
RO
STOPRIS
DATARIS
29
13
reserved
0
0
Name
2
C) Interface
RO
RO
28
12
0
0
2
C Slave Raw Interrupt Status (I2CSRIS), offset 0x010
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0x00
0
9
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Stop Condition Raw Interrupt Status
This bit specifies the raw interrupt state for stop condition detect (prior
to masking) of the I
otherwise, an interrupt is not pending.
Start Condition Raw Interrupt Status
This bit specifies the raw interrupt state for start condition detect (prior
to masking) of the I
otherwise, an interrupt is not pending.
Data Raw Interrupt Status
This bit specifies the raw interrupt state for data received and data
requested (prior to masking) of the I
is pending; otherwise, an interrupt is not pending.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
2
2
C slave block. If set, an interrupt is pending;
C slave block. If set, an interrupt is pending;
RO
RO
21
0
5
0
RO
RO
20
0
4
0
2
C slave block. If set, an interrupt
RO
RO
19
0
3
0
STOPRIS
RO
RO
18
0
2
0
STARTRIS
RO
RO
17
0
1
0
June 02, 2008
DATARIS
RO
RO
16
0
0
0
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