LM3S3739 Luminary Micro, Inc, LM3S3739 Datasheet - Page 18

• Manufacturer Part Number: LM3S3739
• Description: Lm3s3739 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
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Inter-Integrated Circuit (I
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Univeral Serial Bus (USB) Controller ......................................................................................... 494
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SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 447
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 448
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 449
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 450
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 451
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 452
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 453
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 454
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 455
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 456
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 457
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 458
I
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USB Device Functional Address (USBFADDR), offset 0x000 ............................................ 509
USB Power (USBPOWER), offset 0x001 ......................................................................... 510
USB Transmit Interrupt Status (USBTXIS), offset 0x002 ................................................... 512
USB Receive Interrupt Status (USBRXIS), offset 0x004 ................................................... 513
USB Transmit Interrupt Enable (USBTXIE), offset 0x006 .................................................. 514
USB Receive Interrupt Enable (USBRXIE), offset 0x008 .................................................. 515
USB General Interrupt Status (USBIS), offset 0x00A ........................................................ 516
USB Interrupt Enable (USBIE), offset 0x00B .................................................................... 518
USB Frame Value (USBFRAME), offset 0x00C ................................................................ 520
USB Endpoint Index (USBEPIDX), offset 0x0E ................................................................ 521
USB Test Mode (USBTEST), offset 0x00F ....................................................................... 522
USB FIFO Endpoint 0 (USBFIFO0), offset 0x020 ............................................................. 524
USB FIFO Endpoint 1 (USBFIFO1), offset 0x024 ............................................................. 524
USB FIFO Endpoint 2 (USBFIFO2), offset 0x028 ............................................................. 524
USB FIFO Endpoint 3 (USBFIFO3), offset 0x02C ............................................................ 524
USB Device Control (USBDEVCTL), offset 0x060 ............................................................ 525
USB Transmit Dynamic FIFO Sizing (USBTXFIFOSZ), offset 0x062 ................................. 527
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C Master Slave Address (I2CMSA), offset 0x000 ........................................................... 473
C Master Control/Status (I2CMCS), offset 0x004 ........................................................... 474
C Master Data (I2CMDR), offset 0x008 ......................................................................... 478
C Master Timer Period (I2CMTPR), offset 0x00C ........................................................... 479
C Master Interrupt Mask (I2CMIMR), offset 0x010 ......................................................... 480
C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ................................................. 481
C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 482
C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 483
C Master Configuration (I2CMCR), offset 0x020 ............................................................ 484
C Slave Own Address (I2CSOAR), offset 0x000 ............................................................ 486
C Slave Control/Status (I2CSCSR), offset 0x004 ........................................................... 487
C Slave Data (I2CSDR), offset 0x008 ........................................................................... 489
C Slave Interrupt Mask (I2CSIMR), offset 0x00C ........................................................... 490
C Slave Raw Interrupt Status (I2CSRIS), offset 0x010 ................................................... 491
C Slave Masked Interrupt Status (I2CSMIS), offset 0x014 .............................................. 492
C Slave Interrupt Clear (I2CSICR), offset 0x018 ............................................................ 493
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C) Interface ........................................................................................ 459
Preliminary
June 02, 2008