LM3S3739 Luminary Micro, Inc, LM3S3739 Datasheet - Page 71

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LM3S3739

Manufacturer Part Number
LM3S3739
Description
Lm3s3739 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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6.3
Table 6-1. System Control Register Map
June 02, 2008
Offset
0x01C
0x05C
0x06C
0x07C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
0x028
0x030
0x034
0x040
0x044
0x048
0x050
0x054
0x058
0x060
0x064
0x070
Name
DID0
DID1
DC0
DC1
DC2
DC3
DC4
DC5
DC6
DC7
PBORCTL
LDOPCTL
SRCR0
SRCR1
SRCR2
RIS
IMC
MISC
RESC
RCC
PLLCFG
GPIOHSCTL
RCC2
MOSCCTL
Register Map
Table 6-1 on page 71 lists the System Control registers, grouped by function. The offset listed is a
hexadecimal increment to the register’s address, relative to the System Control base address of
0x400F.E000.
Note:
Note:
Spaces in the System Control register space that are not used are reserved for future or
internal use by Luminary Micro, Inc. Software should not modify any reserved memory
address.
Additional Flash and ROM registers defined in the System Control register space are
described in the “Internal Memory” on page 151.
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
0xBFFF.0FC0
0x0000.F0FF
0x03C0.0F3F
0x0000.7FFD
0x0780.3AD1
0x00FF.003F
0x0001.32FF
0x0000.0000
0x0000.0002
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0780.6810
0x0000.0000
0x030F.5037
0x00000000
0x00000000
0x00000000
Reset
-
-
-
-
Preliminary
Description
Device Identification 0
Device Identification 1
Device Capabilities 0
Device Capabilities 1
Device Capabilities 2
Device Capabilities 3
Device Capabilities 4
Device Capabilities 5
Device Capabilities 6
Device Capabilities 7
Brown-Out Reset Control
LDO Power Control
Software Reset Control 0
Software Reset Control 1
Software Reset Control 2
Raw Interrupt Status
Interrupt Mask Control
Masked Interrupt Status and Clear
Reset Cause
Run-Mode Clock Configuration
XTAL to PLL Translation
GPIO High Speed Control
Run-Mode Clock Configuration 2
Main Oscillator Control
LM3S3739 Microcontroller
page
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