SC16C850V NXP Semiconductors, SC16C850V Datasheet - Page 13

• Manufacturer Part Number: SC16C850V
• Description: XScale VLIO bus interface
• Manufacturer: NXP Semiconductors

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SC16C850V_4
Product data sheet
6.10 Loopback mode
The internal loopback capability allows on-board diagnostics. In the Loopback mode, the
normal modem interface pins are disconnected and reconfigured for loopback internally
(see
In the Loopback mode, the transmitter output (TX) and the receiver input (RX) are
disconnected from their associated interface pins, and instead are connected together
internally. The CTS, DSR, CD, and RI are disconnected from their normal modem control
inputs pins, and instead are connected internally to RTS, DTR, MCR[3] (OP2) and
MCR[2] (OP1). Loopback test data is entered into the transmit holding register via the
user data bus interface, AD[7:0]. The transmit UART serializes the data and passes the
serial data to the receive UART via the internal loopback connection. The receive UART
converts the serial data back into parallel data that is then made available at the user data
interface AD[7:0]. The user optionally compares the received data to the initial transmitted
data for verifying error-free operation of the UART TX/RX circuits.
In this mode, the receiver and transmitter interrupts are fully operational. The modem
control interrupts are also operational.
Figure
6). MCR[3:0] register bits are used for controlling loopback diagnostic testing.
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Rev. 04 — 14 January 2008
SC16C850V
© NXP B.V. 2008. All rights reserved.
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