SC16C850V NXP Semiconductors, SC16C850V Datasheet - Page 47

• Manufacturer Part Number: SC16C850V
• Description: XScale VLIO bus interface
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
17. Contents
1
2
3
4
5
5.1
5.2
6
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.11.1
6.11.2
6.12
6.13
6.13.1
6.13.2
6.13.3
6.13.3.1
6.13.3.2
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.4
7.5
7.6
7.7
7.8
7.9
7.10
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 6
Register descriptions . . . . . . . . . . . . . . . . . . . 17
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
UART selection . . . . . . . . . . . . . . . . . . . . . . . . . 6
Extended mode (128-byte FIFO) . . . . . . . . . . . 7
Internal registers. . . . . . . . . . . . . . . . . . . . . . . . 7
FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . . 8
32-byte FIFO mode. . . . . . . . . . . . . . . . . . . . . . 8
128-byte FIFO mode. . . . . . . . . . . . . . . . . . . . . 8
Hardware flow control . . . . . . . . . . . . . . . . . . . . 8
Software flow control . . . . . . . . . . . . . . . . . . . . 9
Special character detect . . . . . . . . . . . . . . . . . 10
Interrupt priority and time-out interrupts . . . . . 10
Programmable baud rate generator . . . . . . . . 11
Loopback mode . . . . . . . . . . . . . . . . . . . . . . . 13
Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Conditions to enter Sleep mode . . . . . . . . . . . 15
Conditions to resume normal operation . . . . . 15
Low power feature . . . . . . . . . . . . . . . . . . . . . 15
RS-485 Features . . . . . . . . . . . . . . . . . . . . . . 16
Auto RS-485 RTS control . . . . . . . . . . . . . . . . 16
RS-485 RTS inversion . . . . . . . . . . . . . . . . . . 16
Auto 9-bit mode (RS-485). . . . . . . . . . . . . . . . 16
Normal Multi-drop mode . . . . . . . . . . . . . . . . . 16
Auto address detection . . . . . . . . . . . . . . . . . . 17
Transmit (THR) and Receive (RHR) Holding
Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Interrupt Enable Register (IER) . . . . . . . . . . . 20
IER versus transmit/receive FIFO interrupt
mode operation. . . . . . . . . . . . . . . . . . . . . . . . 21
IER versus receive/transmit FIFO polled
mode operation. . . . . . . . . . . . . . . . . . . . . . . . 21
FIFO Control Register (FCR) . . . . . . . . . . . . . 22
FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Interrupt Status Register (ISR) . . . . . . . . . . . . 23
Line Control Register (LCR) . . . . . . . . . . . . . . 24
Modem Control Register (MCR) . . . . . . . . . . . 25
Line Status Register (LSR) . . . . . . . . . . . . . . . 26
Modem Status Register (MSR). . . . . . . . . . . . 27
Extra Feature Control Register (EFCR) . . . . . 28
Scratchpad Register (SPR) . . . . . . . . . . . . . . 28
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
8
9
10
10.1
11
12
12.1
12.2
12.3
12.4
13
14
15
15.1
15.2
15.3
15.4
16
17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 35
Static characteristics . . . . . . . . . . . . . . . . . . . 35
Dynamic characteristics . . . . . . . . . . . . . . . . . 36
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 41
Soldering of SMD packages . . . . . . . . . . . . . . 42
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 44
Revision history . . . . . . . . . . . . . . . . . . . . . . . 45
Legal information . . . . . . . . . . . . . . . . . . . . . . 46
Contact information . . . . . . . . . . . . . . . . . . . . 46
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Division Latch (DLL and DLM) . . . . . . . . . . . . 28
Transmit FIFO Level Count (TXLVLCNT) . . . . 28
Receive FIFO Level Count (RXLVLCNT) . . . . 28
Enhanced Feature Register (EFR). . . . . . . . . 29
Transmit Interrupt Level register (TXINTLVL) . 30
Receive Interrupt Level register (RXINTLVL) . 30
Flow Control Trigger Level High (FLWCNTH). 31
Flow Control Trigger Level Low (FLWCNTL) . 31
Clock prescaler (CLKPRES) . . . . . . . . . . . . . 31
RS-485 turn-around time delay (RS485TIME) 32
Advanced Feature Control Register 1
(AFCR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Advanced Feature Control Register 2
(AFCR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
SC16C850V external reset condition and
software reset. . . . . . . . . . . . . . . . . . . . . . . . . 34
Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 37
Introduction to soldering. . . . . . . . . . . . . . . . . 42
Wave and reflow soldering . . . . . . . . . . . . . . . 42
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 42
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 43
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 46
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 46
SC16C850V
Document identifier: SC16C850V_4
Date of release: 14 January 2008
All rights reserved.