MBM29BS12DH Fujitsu Media Devices, MBM29BS12DH Datasheet - Page 73
MBM29BS12DH
Manufacturer Part Number
MBM29BS12DH
Description
(MBM29FS12DH / MBM29BS12DH) BURST MODE FLASH MEMORY CMOS 128M (8M X 16) BIT
Manufacturer
Fujitsu Media Devices
Datasheet
1.MBM29BS12DH.pdf
(84 pages)
- Current page: 73 of 84
- Download datasheet (2Mb)
Notes :
Address
Data
RDY
AVD
CLK
CE
OE
The timings are similar to synchronous read timings.
VA = Valid Address. Two read cycles are required to determine status. When the
RDY is active with data (A
Embedded Algorithm operation is complete, the toggle bits will stop toggling.
When A
VA
Figure 25
18
= 1 in the Burst Mode Configuration Register, RDY is active one clock cycle before data.
Synchronous Data Polling Timings/Toggle Bit Timings
t
IACC
18
= 0 in the Burst Mode Configuration Register).
Status Data
VA
MBM29BS/FS12DH
t
IACC
Status Data
15
73
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