a1240a-pg132b Actel Corporation, a1240a-pg132b Datasheet - Page 2

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a1240a-pg132b

Manufacturer Part Number
a1240a-pg132b
Description
Hirel Fpgas
Manufacturer
Actel Corporation
Datasheet

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Pr od uc t F am i l y P r o f i l e
H i gh - R el i a bi l i t y , L o w - Ri s k So l ut i on
Actel builds the most reliable field programmable gate arrays
(FPGAs) in the industry, with overall antifuse reliability
ratings
corresponding to a useful life of more than 40 years. Actel
FPGAs have been production proven, with more than five
million devices shipped and more than one trillion antifuses
manufactured. Actel devices are fully tested prior to
shipment, with an outgoing defect level of less than 100 ppm.
(Further reliability data is available in the Actel Device
Reliability Report, at http://www.actel.com/hirel).
B en ef i t s
Mi nim i zed C os t Ri sk
With Actel’s line of development tools, designers can produce
as many chips as they choose for just the cost of the device
itself. There will be no NRE charges to cut into the
development budget each time a new design is tried.
M i n im i zed T i m e R is k
After the design is entered, placement and routing is
automatic, and programming the device takes only about 5 to
15 minutes for an average design. Designers save time in the
design entry process by using tools with which they are
familiar.
Mi nim i zed R el iabi li ty R is k
The PLICE antifuse is a one-time programmable, nonvolatile
connection.
programmed, no downloading from EPROM or SRAM storage
is required. Inadvertent erasure is impossible, and there is no
need to reload the program after power disruptions.
Fabrication using a low-power CMOS process means cooler
2
Capacity
Logic Modules
Flip-Flops (maximum)
User I/Os (maximum)
Packages (by pin count)
Performance
System Gates
Logic Gates
SRAM Bits
S-Modules
C-Modules
Decode
CPGA
CQFP
System Speed (maximum)
of
less
Since
than
Actel
10
devices
Failures-In-Time
Device
Family
are
A1240A
40 MHz
6,000
4,000
permanently
684
348
336
568
104
132
NA
NA
(FITs),
ACT 2
A1280A
40 MHz
12,000
8,000
1,232
624
608
998
140
176
172
NA
NA
junction temperatures. Actel’s non-PLD architecture delivers
lower dynamic operating current. Our reliability tests show a
very low failure rate of 6.6 FITs at 90°C junction temperature
with no degradation in AC performance. Special stress testing
at wafer test eliminates infant mortalities prior to packaging.
M ini m ized S ecu ri ty R is k
Reverse engineering of programmed Actel devices from
optical or electrical data is extremely difficult. Programmed
antifuses cannot be identified from a photograph or by using
an SEM. The antifuse map cannot be deciphered either
electrically or by microprobing. Each device has a silicon
signature that identifies its origins, down to the wafer lot and
fabrication facility.
M ini m ized T es ti ng Ri sk
Unprogrammed Actel parts are extensively tested at the
factory. Routing tracks, logic modules, and programming,
debug and test circuits are 100 percent tested before
shipment. AC performance is ensured by special speed path
tests, and programming circuitry is verified on test antifuses.
During the programming process, an algorithm is run to
ensure that all antifuses are correctly programmed. In
addition, Actel’s Silicon Explorer diagnostic tool uses
ActionProbe circuitry, allowing 100 percent observability of
all internal nodes to check and debug the design.
A c t e l FP G A De sc r i p t i o n
The Actel families of FPGAs offer a variety of packages,
speed/performance characteristics, and processing levels for
use in all high reliability and military applications. Devices
are implemented in a silicon gate, two-level metal CMOS
process, utilizing Actel’s PLICE antifuse technology. This
20 MHz
A1010B
1,800
1,200
295
295
147
NA
NA
57
84
ACT 1
20 MHz
A1020B
3,000
2,000
547
547
273
NA
NA
69
84
84

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