s29ns01gs Meet Spansion Inc., s29ns01gs Datasheet - Page 19

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s29ns01gs

Manufacturer Part Number
s29ns01gs
Description
S29ns01gs 1024 Megabit 128 Megabyte 16-bit Data Width, Burst Access, Simultaneous Read/write, 1.8 Volt-only Flash Memory In 65 Nm Mirrorbit Technology
Manufacturer
Meet Spansion Inc.
Datasheet
7.
April 20, 2009 S29NS-S_00_02
Device Operations
This section describes the read and write bus operations, program, erase, simultaneous read/write,
handshaking, and reset features of the Flash devices.
The address space of the Flash Memory Array is divided into banks. There are three operation modes for
each bank:
Each bank of the device can be in any operation mode but, only one bank can be in EA or ASO mode at any
one time.
In Read Mode a Flash Memory Array bank may be read by simply selecting the memory, supplying the
address, and taking read data when it is ready. This is done by asynchronous or synchronous accesses from
the host system bus. The CU puts all banks in Read mode during Power-on, after a Hardware Reset, after a
Command Reset (when an ASO is entered), or after a bank is returned to Read mode from EA mode.
During a synchronous read access valid read data is indicated by the RDY signal being in the Ready state
(this may be High or Low depending on the RDY polarity setting in the configuration register). When RDY is in
the not Ready state burst read data is not valid and wait states must be added. The use of the RDY signal to
indicate when valid data is transferred on the system data bus is called handshaking or flow control.
EA and ASO modes are initiated by writing specific address and data patterns into command registers (see
Section 11.1, Command Definitions on page
locations; they are loaded by write bus cycles with the address and data information needed to execute a
command. The contents of the registers serve as input to the Control Unit (CU) and the CU dictates the
function of the device. Writing incorrect address and data values or writing them in an improper sequence
may place the device in an unknown state, in which case the system must write the reset command to return
all banks to Read mode.
The Flash memory array data in a bank that is in EA mode, is stable but undefined, and effectively
unavailable for read access from the host system. While in EA mode the bank is used by the CU in the
execution of commands. Typical command operations are programming or erasing of data in the Flash array.
All other banks are available for read access while the one bank is in EA mode. This ability to read from one
bank while another bank is used in the execution of a command is called Simultaneous Read and Write
(SRW) and allows for continued operation of the system via the reading of data or code from other banks
while one bank is programming or erasing data as a relatively long time frame background task. Only a status
register read command can be used in a bank in EA mode to retrieve the EA status.
While any one of the overlay address spaces are overlaid in a bank (entered) that bank is in ASO mode and
no other bank may be in EA or ASO mode. All EA activity must be completed or suspended before entering
any ASO mode. A command for entering an EA or ASO mode while another bank is in EA or ASO mode will
be ignored.
While an ASO mode is active (entered) in a bank, a read for Flash array data to any other bank is allowed.
ASO mode selects a specific sector for the overlaid address space. Other sectors in the ASO bank still
provide Flash array data and may be read during ASO mode.
While SSR Lock, SSR, or Configuration Register is overlaid only the SSR Lock, SSR, or Configuration
Register respectively may be programmed in the overlaid sector. While any of these ASO areas are being
programmed the ASO bank switches to EA mode. The ID/CFI and factory portion of the SSR ASO is not
customer programmable. An attempt to program in these areas will fail.
Read Mode
Embedded Algorithm (EA) Mode
Address Space Overlay (ASO) Mode
D a t a
S h e e t
S29NS-S MirrorBit
( P r e l i m i n a r y )
®
Eclipse
67). The command registers do not occupy any memory
Flash Family
19

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