mc145156 Lansdale Semiconductor, Inc., mc145156 Datasheet - Page 3

• Manufacturer Part Number: mc145156
• Description: Pll Frequency Synthesizer Family
• Manufacturer: Lansdale Semiconductor, Inc.

LANSDALE Semiconductor, Inc.
INPUT PINS
f in
Frequency Input (Pin 1)
derived from loop V CO and is AC coupled into the device. For
larger amplitude signals (standard CMOS logic levels) DC
coupling may be used.
RA0 – RA2
Reference Address Inputs (Pins 5, 6, 7)
possible divide values for the total reference divider, as defined
by the table below.
logic 1 and require only a SPST switch to alter data to the zero
state.
N0 – N11
N Counter Programming Inputs (Pins 11 – 20, 22 – 25)
counter when it reaches the count of zero. N0 is the least sig-
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Input to the ÷N portion of the synthesizer. f in is typically
These three inputs establish a code defining one of eight
Pull–up resistors ensure that inputs left open remain at a
These inputs provide the data that is preset into the ÷ N
RA2
0
0
0
0
1
1
1
1
Reference Address Code
OSC out
NOTE: N0 – N13 inputs and inputs RA0, RA1, and RA2 have pull–up resistors that are not shown.
OSC in
T/R
f in
PIN DESCRIPTIONS
RA1
0
0
1
1
0
0
1
1
RA0
0
1
0
1
0
1
0
1
V DD
Divide
Divide
Value
Total
1024
2048
2410
8192
128
256
512
8
RA2
RA1
RA0
ML145151 BLOCK DIAGRAM
N13
www.lansdale.com
N11
14 x 8 ROM REFERENCE DECODER
TRANSMIT OFFSET ADDER
14–BIT
14–BIT
N9
nificant and N13 is the most significant. Pull–up resistors en-
sure that inputs left open remain at a logic 1 and require only
an SPST switch to alter data to the zero state.
T/R
Transmit/Receive Offset Adder Input (Pin 21)
the N inputs. This is normally used for offsetting the V CO fre-
quency by an amount equal to the IF frequency of the trans-
ceiver. This offset is fixed at 856 when T/R is low and gives no
offset when T/R is high. A pull–up resistor ensures that no
connection will appear as a logic 1 causing no offset addition.
OSC in , OSC out
Reference Oscillator Input/Output (Pins 27, 26)
nected to terminals of an external parallel resonant crystal.
Frequency setting capacitors of appropriate value must be con-
nected from OSC in to ground and OSC out to ground. OSC in
may also serve as the input for an externally generated refer-
ence signal. This signal is typically AC coupled to OSC in , but
for larger amplitude signals (standard CMOS logic levels) DC
coupling may also be used. In the external reference mode, no
connection is required to OSC out .
OUTPUT PINS
PDout
Phase Detector A Output (Pin 4)
signal. Double–ended outputs are also available for this pur-
pose (see ΦV and ΦR).
This input controls the offset added to the data provided at
These pins form an on–chip reference oscillator when con-
Three–state output of phase detector for use as loop–error
Frequency f V > f R or f V Leading: Negative Pulses
Frequency f V < f R or f V Lagging: Positive Pulses
Frequency f V = f R and Phase Coincidence: High–Imped-
÷
÷
N7 N6
R COUNTER
N COUNTER
ance State
14
14
N4
N2
N0
DETECTOR
DETECTOR
DETECT
PHASE
PHASE
LOCK
A
B
LD
PD out
φ V
φ R
f V
ML145151
Issue A