pcf8534 NXP Semiconductors, pcf8534 Datasheet - Page 25

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pcf8534

Manufacturer Part Number
pcf8534
Description
Universal Driver Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet

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PCF8534_0
Preliminary datasheet
only one device need to be through-plated to the backplane electrodes of the display. The
other PCF8534’s of the cascade contribute additional segment outputs but their
backplane outputs are left open-circuit (see
The SYNC line is provided to maintain the correct synchronization between all cascaded
PCF8534’s. This synchronization is guaranteed after the power-on reset. The only time
that SYNC is likely to be needed is if synchronization is accidentally lost (e.g. by noise in
adverse electrical environments, or by the definition of a multiplex mode when PCF8534’s
with different SA0 levels are cascaded). SYNC is organized as an input / output pad; the
output selection being realized as an open-drain driver with an internal pull-up resistor. A
PCF8534 asserts the SYNC line at the onset of its last active backplane signal and
monitors the SYNC line at all other times. If synchronization in the cascade is lost, it is
restored by the first PCF8534 to assert SYNC. The timing relationship between the
backplane waveforms and the SYNC signal for the various drive modes of the PCF8534
are shown in
The contact resistance between the SYNC pads of cascaded devices must be controlled.
If the resistance is too high then the device will not be able to synchronize properly.
Table 18
Table 18.
Number of devices
2
3 to 5
6 to 10
11 to 16
shows the limiting values for contact resistance.
SYNC contact resistance
Figure
Rev. 00.05 — 20 February 2007
18.
Universal LCD driver for low multiplex rates
Figure
Maximum contact resistance
6000 Ω
2200 Ω
1200 Ω
700 Ω
17).
PCF8534
© NXP B.V. 2007. All rights reserved.
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