pcf8534 NXP Semiconductors, pcf8534 Datasheet - Page 7

• Manufacturer Part Number: pcf8534
• Description: Universal Driver Multiplex Rates
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF8534_0
Preliminary datasheet
Fig 3. Typical system configuration
V DD
V SS
6.1 Power-on-reset
6.2 LCD bias generator
6.3 LCD voltage selector
CONTROLLER
PROCESSOR/
MICRO-
MICRO-
At power on the PCF8534 resets to a starting condition as follows:
You must avoid data transfers on the I
reset action to complete.
Fractional LCD biasing voltages are obtained from an internal voltage divider of the three
series resistors connected between V
out of the circuit to provide a
The LCD voltage selector co-ordinates the multiplexing of the LCD in accordance with the
selected LCD drive configuration. The operation of the voltage selector is controlled by
MODE SET commands from the command decoder.
The biasing configurations that apply to the preferred modes of operation, together with
the biasing characteristics as functions of V
are shown in
HOST
1. All backplane outputs are set to V
2. All segment outputs are set to V
3. The drive mode ‘1 : 4 multiplex with
4. Blinking is switched off.
5. Input and output bank selectors are reset (as defined in Table 7 old datasheet).
6. The I
7. The data pointer and the subaddress counter are cleared.
8. Display disabled.
R
2C B
t r
2
C-bus interface is initialized.
Table
5.
Rev. 00.05 — 20 February 2007
OSC
SDA
SCL
A0
1
⁄
2
bias voltage level for the 1:2 multiplex configuration.
PCF8534
A1
V DD
LCD
A2
LCD
LCD
2
V LCD
C-bus for 1 ms following power on to allow the
.
1
SA0
.
⁄
3
and V
Universal LCD driver for low multiplex rates
bias’ is selected.
OP
V SS
and the resulting discrimination ratios (D),
60 segment drives
SS
4 backplanes
. The centre resistor can be switched
LCD PANEL
(up to 240
elements)
MGL744v02
PCF8534
© NXP B.V. 2007. All rights reserved.
7 of 40