adc1613s NXP Semiconductors, adc1613s Datasheet - Page 23

• Manufacturer Part Number: adc1613s
• Description: Adc1613s Series Single 16-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Serial Jesd204a Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ADC1613S_SER
Product data sheet
11.6.1 Register description
11.6 Serial Peripheral Interface (SPI)
The ADC1613S serial interface is a synchronous serial communications port allowing
easy interfacing with many industry microprocessors. It provides access to the registers
that control the operation of the chip in both read and write modes.
This interface is configured as a 3-wire type (SDIO as bidirectional pin).
Pin SCLK acts as the serial clock and pin CS acts as the serial chip select.
Each read/write operation is sequenced by the CS signal and enabled by a LOW level to
to drive the chip with N bytes, depending on the content of the instruction byte
(see
Table 14.
[1]
Table 15.
[1]
Table 16.
Bits A12 to A0 indicate the address of the register being accessed. In the case of a
multiple byte transfer, this address is the first register to be accessed. An address counter
is incremented to access subsequent addresses.
The steps involved in a data transfer are as follows:
Bit
Description
R/W
0
1
W1
0
0
1
1
1. The falling edge on pin CS in combination with a rising edge on pin SCLK determine
2. The first phase is the transfer of the 2-byte instruction.
3. The second phase is the transfer of the data which can be vary in length but is always
4. A rising edge on pin CS indicates the end of data transmission.
R/W indicates whether a read or write transfer occurs after the instruction byte
Bits W1 and W0 indicate the number of bytes transferred.
the start of communications.
a multiple of 8 bits. The MSB is always sent first (for instruction and data bytes).
[1]
Table
Instruction bytes for the SPI
Read or Write mode access description
Number of bytes to be transferred
14).
All information provided in this document is subject to legal disclaimers.
Description
Write mode operation
Read mode operation
MSB
7
R/W
A7
[1]
Rev. 1 — 14 March 2011
6
W1
A6
W0
0
1
0
1
5
W0
A5
Single 16-bit ADC; serial JESD204A interface
4
A12
A4
ADC1613S series
3
A11
A3
Number of bytes transferred
1 byte
2 bytes
3 bytes
4 or more bytes
2
A10
A2
© NXP B.V. 2011. All rights reserved.
1
A9
A1
LSB
0
A8
A0
23 of 39