adc1613s NXP Semiconductors, adc1613s Datasheet - Page 26
adc1613s
Manufacturer Part Number
adc1613s
Description
Adc1613s Series Single 16-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Serial Jesd204a Interface
Manufacturer
NXP Semiconductors
Datasheet
1.ADC1613S.pdf
(39 pages)
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Table 17.
[1]
[2]
Address
(hex)
080A
080B
0820
0821
0822
0823
0824
0825
0826
0827
0828
0829
082D
084D
0871
0891
an "*" in the Access column means that this register is subject to control access conditions in Write mode.
an "*" in the Default column replaces a bit of which the value depends on the binary level of external pins (e.g. CFG[3:0], Swing[1:0], Scrambler).
Register name
Ser_ScramblerB
Ser_PRBS_Ctrl
Cfg_0_DID
Cfg_1_BID
Cfg_3_SCR_L
Cfg_4_F
Cfg_5_K
Cfg_6_M
Cfg_7_CS_N
Cfg_8_Np
Cfg_9_S
Cfg_10_HD_CF
Cfg_02_2_LID
Cfg02_13_FCHK R
Lane_0_Ctrl
ADC_0_Ctrl
Register allocation map
Access
R/W
R/W
R
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W
R/W
[1]
…continued
Bit 7
SCR
HD
0
0
0
0
0
0
0
0
0
0
0
SCR_IN_
MODE
CS[0]
Bit 6
0
0
0
0
0
0
0
0
0
0
0
LANE_MODE[1:0]
ADC_MODE[1:0]
Bit 5
0
0
0
0
0
0
0
0
0
0
0
Bit 4
0
0
0
0
0
0
0
0
MSB_INIT[7:0]
Bit definition
FCHK[7:0]
DID[7:0]
Bit 3
0
0
0
0
0
0
0
0
LID[4:0]
LANE_
NP[4:0]
Bit 2
K[4:0]
POL
0
0
0
0
0
0
BID[3:0]
N[3:0]
Bit 1
F[2:0]
PRBS_TYPE[1:0]
0
0
0
0
0
CF[1:0]
LANE_PD
ADC_PD
Bit 0
M
L
S
Default
(bin)
1111 1111
0000
0000
1110
1101
0000
1010
0000
0000
0000 0***
000* ****
0000
000*
0100
0110
0000
1111
0000
0000
*000
0000
0001
1100
**** ****
0000
0000
0000
0000
[2]
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