uda1324ts NXP Semiconductors, uda1324ts Datasheet - Page 5

• Manufacturer Part Number: uda1324ts
• Description: Ultra Low-voltage Stereo Filter Dac
• Manufacturer: NXP Semiconductors

Philips Semiconductors
In the L3 mode, pin APPL0 must be set to LOW. It should
be noted that when the L3 mode is used, an initialization
must be performed when the IC is powered-up.
Digital interface
D
The digital interface of the UDA1324TS supports multiple
format inputs (see Fig.3).
Left and right data-channel words are time multiplexed.
The WS signal must have a 50% duty factor for all
LSB-justified formats.
The BCK clock can be up to 64f
BCK frequency is 64 times the Word Select (WS)
frequency or less: f
Important: the WS edge MUST fall on the negative edge
of the BCK at all times for proper operation of the digital
interface.
The UDA1324TS also accepts double speed data for
double speed data monitoring purposes.
L3
S
These four formats are selectable via the static pin codes
SF0 and SF1 (see Table 3).
Table 3 Input format selection using SF0 and SF1
2001 Mar 27
I
LSB-justified 16 bits
LSB-justified 18 bits
LSB-justified 20 bits
2
TATIC PIN MODE
ATA FORMATS
I
MSB-justified format with data word length up to 20 bits
LSB-justified format with data word length of
16, 18 or 20 bits.
I
LSB-justified format with data word length of
16, 18 or 20 bits.
S-bus
Ultra low-voltage stereo filter DAC
2
2
MODE
S-bus format with data word length of up to 20 bits
S-bus format with data word length of up to 20 bits
FORMAT
BCK
64
f
WS
s
, or in other words the
.
SF0
0
0
1
1
SF1
0
1
0
1
5
Interpolation filter
The digital filter interpolates from 1f
a recursive filter and a FIR filter (see Table 4).
Table 4 Interpolation filter characteristics
Noise shaper
The 3rd-order noise shaper operates at 128f
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a Filter
Stream Digital-to-Analog Converter (FSDAC).
Filter stream DAC
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. A post filter is not needed due
to the inherent filter function of the DAC. On-board
amplifiers convert the FSDAC output current to an output
voltage capable of driving a line output.
The output voltage of the FSDAC scales linearly with the
power supply voltage.
Pass-band ripple
Stop band
Dynamic range
ITEM
CONDITION
0 to 0.45f
0 to 0.45f
>0.55f
s
s
s
s
to 128f
UDA1324TS
Product specification
VALUE (dB)
s
by cascading
s
. It shifts
108
0.1
50