uda1324ts NXP Semiconductors, uda1324ts Datasheet - Page 9

• Manufacturer Part Number: uda1324ts
• Description: Ultra Low-voltage Stereo Filter Dac
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Programming the features
When the data transfer of type ‘status’ is selected, the features for the system clock frequency and the data input format
can be controlled.
Table 6 Data transfer of type ‘status’
When the data transfer of type ‘data’ is selected, the features for volume, de-emphasis and mute can be controlled.
Table 7 Data transfer of type ‘data’
2001 Mar 27
handbook, full pagewidth
BIT 7
BIT 7
Ultra low-voltage stereo filter DAC
0
1
0
0
1
1
BIT 6
BIT 6
0
0
0
1
0
1
L3CLOCK
L3MODE
BIT 5
BIT 5
L3DATA
SC1
VC5
0
0
0
0
BIT 4
BIT 4
SC0
VC4
DE1
0
0
0
BIT 3
BIT 3
VC3
DE0
IF2
address
0
0
0
BIT 2
BIT 2
VC2
IF1
MT
Fig.6 Multibyte data transfer.
0
0
0
data byte #1
BIT 1
BIT 1
VC1
IF0
0
0
0
0
9
BIT 0
BIT 0
VC0
t stp(L3)
0
0
0
0
1
data byte #2
SC = system clock frequency (2 bits); see Table 8
IF = data input format (3 bits); see Table 9
not used
VC = volume control (6 bits); see Table 11
not used
DE = de-emphasis (2 bits); see Table 10
MT = mute (1 bit); see Table 12
default setting
REGISTER SELECTED
REGISTER SELECTED
address
MGL725
UDA1324TS
Product specification