dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 166
dsp56800e
Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800E.pdf
(706 pages)
- Current page: 166 of 706
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Data Arithmetic Logic Unit
At other times, when it is necessary to maintain the full 32-bit precision of an integer multiplication, use
the IMPY.L instruction. Figure 5-16 shows an integer multiplication with a long-word result. The 32-bit
long integer result is placed into the FF1 and FF0 portions of an accumulator, with sign extension placed in
the extension register (FF2).
5.3.3.3
The source operands for the three-operand multiplication and multiply-accumulate instructions must be
specified in a particular order so that they are dispatched to the appropriate units in the data ALU. The
5-20
Multiplier Result
Multiplier Result
Signed Integer
IMPY.W Result
Input Operands
Input Operands
Signed Integer
IMPY.L Result
Signed Integer
Signed Integer
Signed 31-Bit
Signed 31-Bit
Intermediate
Intermediate
Operand Re-Ordering for Multiplication Instructions
Figure 5-16. Integer Multiplication with Long-Word-Sized Result (IMPY.L)
Figure 5-15. Integer Multiplication with Word-Sized Result (IMPY.W)
(Sign Extension)
EXT
s
s
DSP56800E Core Reference Manual
s
s
Input Operand 1
Input Operand 1
16 Bits
16 Bits
16 Bits
MSP
MSP
36 Bits
31 Bits
31 Bits
X
X
s
s
s
Signed Multiplier
Signed Multiplier
Input Operand 2
Input Operand 2
Freescale Semiconductor
(Unchanged)
16 Bits
16 Bits
16 Bits
LSP
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