ep1s25 Altera Corporation, ep1s25 Datasheet - Page 261
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ep1s25
Manufacturer Part Number
ep1s25
Description
Stratix Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP1S25.pdf
(276 pages)
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Notes to
(1)
(2)
t
t
DUTY
LOCK
Table 4–125. High-Speed I/O Specifications for Flip-Chip Packages (Part 4 of 4)
Symbol
When J = 4, 7, 8, and 10, the SERDES block is used.
When J = 2 or J = 1, the SERDES is bypassed.
Table
4–125:
LVDS (J = 2
through 10)
LVDS (J =1)
and LVPECL,
PCML,
HyperTransport
technology
All
Conditions
47.5
Min
45
-5 Speed Grade
Typ
50
50
Max
52.5
100
55
47.5
Min
45
-6 Speed Grade
Typ
50
50
Max
52.5
100
55
Notes
47.5
Min
45
(1),
-7 Speed Grade
(2)
Typ
50
50
Max
52.5
100
55
47.5
Min
45
-8 Speed Grade
Typ
50
50
Max
52.5
100
55
Unit
μs
%
%
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