xc3s1400an Xilinx Corp., xc3s1400an Datasheet - Page 25
xc3s1400an
Manufacturer Part Number
xc3s1400an
Description
Spartan-3an Fpga Family Data Sheet
Manufacturer
Xilinx Corp.
Datasheet
1.XC3S1400AN.pdf
(108 pages)
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Input Setup and Hold Times
Table 21: Setup and Hold Times for the IOB Input Path
DS557-3 (v3.1) June 2, 2008
Product Specification
Setup Times
T
T
IOPICK
IOPICKD
Symbol
R
Time from the setup of data at the
Input pin to the active transition at the
ICLK input of the Input Flip-Flop (IFF).
No Input Delay is programmed.
Time from the setup of data at the
Input pin to the active transition at the
ICLK input of the Input Flip-Flop (IFF).
The Input Delay is programmed.
Description
LVCMOS25
LVCMOS25
Conditions
www.xilinx.com
(2)
(2)
DELAY_
VALUE
IFD_
0
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
Device
DC and Switching Characteristics
1.56
1.71
1.30
1.34
1.36
2.16
3.10
3.51
4.04
3.88
4.72
5.47
5.97
2.05
2.72
3.38
3.88
3.69
4.56
5.34
5.85
1.79
2.43
3.02
3.49
3.41
4.20
4.96
5.44
Min
Speed Grade
-5
1.58
1.81
1.51
1.51
1.74
2.18
3.12
3.76
4.32
4.24
5.09
5.94
6.52
2.20
2.93
3.78
4.37
4.20
5.23
6.11
6.71
2.02
2.67
3.43
3.96
3.95
4.81
5.66
6.19
Min
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25