pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 509

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pnx1500

Manufacturer Part Number
pnx1500
Description
Pnx15xx Series Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
Figure 1:
Audio Out Block Diagram
OSCLK
SCK
WS
SD[2]
SD[3]
SD[0]
SD[1]
2.1 External Interface
Parallel To Serial Converter
Clock Divider/Generator
second buffer in memory as a request for a new first sample buffer in memory is
issued to the system controller. This action is repeated as the buffers in memory are
sent out.
The samples are given to the data serializer (parallel-to-serial converter), which
sends them out in a MSB first or LSB first serial frame format that can also contain
one or two codec control words of up to 16 bits. The output frame structure is
programmable.
The Audio Out module has seven signals connected to the external world:
Serial
Clock
AO_OSCLK referenced as OSCLK in this chapter.
AO_SCK referenced as SCK in this chapter.
AO_WS referenced as WS in this chapter.
AO_SD[3:0] referenced as SD[3:0] in this chapter.
Shift Register
Shift Register
Shift Register
Shift Register
SCK Divider
WS Divider
Rev. 3 — 17 March 2006
Framing/Sample Options
Divider Value
Divider Value
Parallel
Data
DTL DMA Interface Logic
MMIO Registers & Logic
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
Chapter 15: Audio Output
15-2

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