pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 677
pnx1500
Manufacturer Part Number
pnx1500
Description
Pnx15xx Series Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500.pdf
(828 pages)
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Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
3.2 Register Definitions
Table 1: LAN100 MMIO Register Map
In QoS mode, that is, when the EnableQoS bit of the Command register is set, the
real-time transmit registers correspond to the registers of the low-priority transmit
channel and the non-real-time transmit registers correspond to the registers of the
high priority transmit channel.
This section defines the bits of the individual LAN100 registers. The MII Interface
registers are mapped to addresses in the range 0x07 2000 – 0x07 20FC. For more
information about the MII Interface registers than is provided here, please refer to [2].
Offset
0x07 2230
0x07 2234
0x07 2238
0x07 223C
0x07 2240
0x07 2244
0x07 2248
0x07 224C
0x07 2250
0x07 2254
0x07 2258
0x07 225C
0x07 2260
0x07 2264
0x07 2268
0x07 226C
0x07 2270
to
0x07 2FDC
Standard Registers
0x07 2FE0
0x07 2FE4
0x07 2FE8
0x07 2FEC IntSet
0x07 2FF0
0x07 2FF4
0x07 2FF8
0x07 2FFC ModuleID
Name
PatternMatchMask0L
PatternMatchMask0H
PatternMatchCRC0
PatternMatchSkip0
PatternMatchMask1L
PatternMatchMask1H
PatternMatchCRC1
PatternMatchSkip1
PatternMatchMask2L
PatternMatchMask2H
PatternMatchCRC2
PatternMatchSkip2
PatternMatchMask3L
PatternMatchMask3H
PatternMatchCRC3
PatternMatchSkip3
IntStatus
IntEnable
IntClear
PowerDown
Rev. 3 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
WO
WO
R/W
RO
Function
Bit 31:0 of Pattern Match 0
Bit 63:32 of Pattern Match 0
CRC Value for Pattern Match 0
Skip Bytes for Pattern Match 0
Bit 31:0 of Pattern Match 1
Bit 63:32 of Pattern Match 1
CRC Value for Pattern Match 1
Skip Bytes for Pattern Match 1
Bit 31:0 of Pattern Match 2
Bit 63:32 of Pattern Match 2
CRC Value for Pattern Match 2
Skip Bytes for Pattern Match 2
Bit 31:0 of Pattern Match 3
Bit 63:32 of Pattern Match 3
CRC Value for Pattern Match 3
Skip Bytes for Pattern Match 3
Reserved
Interrupt Status register
Interrupt Enable register
Interrupt Clear register
Interrupt Set register
Reserved
Power-down register
Reserved
Module ID
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
23-8
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