mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 108

• Manufacturer Part Number: mc68hc912d60c
• Description: Hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

EEDIVH — EEPROM Modulus Divider
EEDIVL — EEPROM Modulus Divider
EEPROM Memory
8.5 EEPROM Control Registers
Technical Data
108
1. Loaded from SHADOW word.
1. Loaded from SHADOW word.
RESET:
RESET:
CAUTION:
EEDIV7
Bit 7
Bit 7
—
0
0
(1)
EEDIV6
—
6
0
0
6
(1)
A steady internal self-time clock is required to provide accurate counts
to meet EEPROM program/erase requirements. This clock is generated
via a programmable 10-bit prescaler register. Automatic program/erase
termination is also provided.
In ordinary situations, with crystal operating properly, the steady internal
self-time clock is derived from the input clock source (EXTALi). The
divider value is as in EEDIVH:EEDIVL. In limp-home mode, where the
oscillator clock has malfunctioned or is unavailable, the self-time clock is
derived from the PLL at a nominal f
value of $0023. Program/erase operation is not guaranteed in limp-
home mode.
It is strongly recommended that program/erase operation is terminated
in the event of loss of crystal, either by the application software (clearing
EEPGM & EELAT bits) when entering limp home mode or by enabling
the clock monitor to generate a clock monitor reset. This will prevent
unnecessary stress on the emulated EEPROM during oscillator failure.
EEDIV5
—
5
0
0
5
(1)
EEDIV4
EEPROM Memory
—
4
0
0
4
(1)
EEDIV3
—
3
0
0
3
(1)
VCOMIN
EEDIV2
—
2
0
0
2
(1)
using a predefined divider
EEDIV9
EEDIV1
MC68HC912D60A — Rev. 3.1
—
—
1
1
(1)
(1)
Freescale Semiconductor
EEDIV8
EEDIV0
Bit 0
—
Bit 0
—
(1)
(1)
$00EE
$00EF