mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 410

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mc68hc912d60c

Manufacturer Part Number
mc68hc912d60c
Description
Hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Electrical Specifications
Technical Data
410
8-bit resolution
8-bit absolute error
10-bit resolution
10-bit absolute error
MCU clock frequency (p-clock)
ATD operating clock frequency
ATD 8-Bit conversion period
ATD 10-Bit conversion period
Stop and ATD power up recovery time
1. At V
2. These values include quantization error which is inherently 1/2 count for any A/D converter.
1. The minimum time assumes a final sample period of 2 ATD clock cycles while the maximum time assumes a final sample
2. This assumes an ATD clock frequency of 2.0MHz.
3. From the time ADPU is asserted until the time an ATD conversion can begin.
Absolute errors only guaranteed when V
period of 16ATD clocks.
RH
V
V
– V
DD
DD
RL
= 5.0 Vdc ±10%, V
= 5.0 Vdc ±10%, V
(1)
= 5.12V, one 8-bit count = 20 mV, and one 10-bit count = 5mV.
(1)
,(2)
Table 20-6. Analog Converter Characteristics (Operating)
clock cycles
conversion time
clock cycles
conversion time
VDDA = 5.0V
(2)
2, 4, 8, and 16 ATD sample clocks
Characteristic
2, 4, 8, and 16 ATD sample clocks
Characteristic
Table 20-7. ATD AC Characteristics (Operating)
(1)
(1)
SS
SS
= 0 Vdc, T
= 0 Vdc, T
(2)
(2)
(3)
RL
=V
SS
Electrical Specifications
A
A
, V
= T
= T
RH
L
L
=V
to T
to T
DD
H
H
and when external source impedence is close to zero.
, ATD Clock = 2 MHz, unless otherwise noted
, ATD Clock = 2 MHz, unless otherwise noted
Symbol
1 count
1 count
AE
AE
n
t
Symbol
f
n
t
CONV10
ATDCLK
CONV10
CONV8
f
CONV8
PCLK
t
SR
–2.5
Min
−1
MC68HC912D60A — Rev. 3.1
Min
2.0
0.5
18
20
10
9
Typical
20
Freescale Semiconductor
5
Max
8.0
2.0
32
16
34
17
10
Max
2.5
+1
cycles
cycles
MHz
MHz
Unit
µs
µs
µs
count
count
Unit
mV
mV

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