mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 162

• Manufacturer Part Number: mc68hc912d60c
• Description: Hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Clock Functions
11.7 System Clock Frequency formulas
11.8 Clock Divider Chains
Technical Data
162
NOTE:
See
SLWCLK = EXTALi / ( 2 x SLOW )
SLWCLK = EXTALi
PLLCLK = 2 x EXTALi x (SYNR + 1) / (REFDV + 1)
ECLK = SYSCLK / 2
XCLK = SLWCLK / 2
PCLK = SYSCLK / 2
BCLK
Boolean equations:
SYSCLK = (BCSP & PLLCLK) | (BCSP & BCSS & EXTALi) | (BCSP &
BCSS & SLWCLK)
MCLK = (PCLK & MCS) | (XCLK & MCS)
MSCAN system = (EXTALi & CLKSRC) | (SYSCLK & CLKSRC)
BDM system = (BCLK & CLKSW) | (ECLK & CLKSW)
During limp-home mode PCLK, ECLK, BCLK, MCLK and XCLK are
supplied by VCO (PLLCLK).
Figure
clock divider chains for the various peripherals on the
MC68HC912D60A.
1. If SYSCLK is slower than EXTALi (BCSS=1, BCSP=0, SLOW>0), BCLK becomes ECLK.
Figure
(1)
11-6,
= EXTALi / 2
11-6:
Figure
Clock Functions
11-7,
Figure
11-8, and
Figure 11-9
MC68HC912D60A — Rev. 3.1
SLOW = 1,2,..63
SLOW = 0
Freescale Semiconductor
summarize the