mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 164

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mc68hc912d60c

Manufacturer Part Number
mc68hc912d60c
Description
Hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock Functions
Technical Data
164
MCLK
XCLK
÷
÷
1, 2, 3, 4, 5, 6,...,8190, 8191
1, 2, 3, 4, 5, 6,...,8190, 8191
REGISTER: RTICTL
BIT:RTBYP
MODULUS DIVIDER:
MODULUS DIVIDER:
÷
SC0BD
SC1BD
2048
Figure 11-7. Clock Chain for SCI0, SCI1, RTI, COP
the transition, the clock select output will be held low and all CPU activity
will cease until the transition is complete.
The Module Clock Select bit MCS determines the clock used by the ECT
module and the baud rate generators of the SCIs. In limp-home mode,
the output of MCS is forced to 0, but the MCS bit reads the latched value.
It allows normal operation of the serial and timer subsystems at a fixed
reference frequency while allowing the CPU to operate at a higher,
variable frequency.
÷
÷
16
16
÷
4
BAUD RATE (16x)
BAUD RATE (16x)
BAUD RATE (1x)
BAUD RATE (1x)
TRANSMIT
TRANSMIT
RECEIVE
RECEIVE
Clock Functions
SCI0
SCI0
SCI1
SCI1
BITS: RTR2, RTR1, RTR0
REGISTER: RTICTL
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
TO RTI
BITS: CR2, CR1, CR0
REGISTER: COPCTL
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
÷
÷
÷
÷
÷
÷
4
4
4
4
2
2
0:1:0
0:1:1
1:1:0
0:0:1
1:0:0
1:0:1
1:1:1
0:0:0
TO COP

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