mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 145

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mc68hc08az60

Manufacturer Part Number
mc68hc08az60
Description
M68hc08 Family Of 8-bit Microcontroller Units Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc68hc08az60 1J35D
Manufacturer:
FREESCALE
Quantity:
20 000
Data Format
5-mon
MOTOROLA
BREAK
$A5
START
BIT
START
START
BIT
BIT
BIT 0
BIT 0
BIT 0
Table 2
mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
The data transmit and receive rate can be anywhere from 4800 baud to
28.8 kBaud. Transmit and receive baud rates must be identical.
Monitor
1. If the high voltage (V
Modes
BIT 1
User
Freescale Semiconductor, Inc.
asserts its COP enable output. The COP is a mask option enabled or disabled by the
COPD bit in the configuration register. See
istics
Figure 3. Sample Monitor Waveforms
BIT 1
BIT 1
For More Information On This Product,
Figure 2. Monitor Data Format
BIT 2
is a summary of the differences between user mode and monitor
on page 410.
Disabled
BIT 2
BIT 2
Enabled
Go to: www.freescale.com
COP
BIT 3
Monitor ROM (MON)
BIT 3
BIT 3
(1)
HI
) is removed from the IRQ/V
BIT 4
Table 2. Mode Differences
Vector
$FEFE
$FFFE
Reset
BIT 4
BIT 4
High
BIT 5
BIT 5
BIT 5
Vector
$FFFF
$FEFF
Reset
Low
BIT 6
BIT 6
BIT 6
Functions
5.0 Volt DC Electrical Character-
Figure 2
Vector
$FFFC
$FEFC
BIT 7
Break
High
BIT 7
BIT 7
PP
pin while in monitor mode, the SIM
STOP
BIT
and
STOP
STOP
Vector
$FEFD
$FFFD
Break
MC68HC08AZ60 — Rev 1.0
BIT
BIT
Low
START
NEXT
Figure
BIT
Functional Description
START
START
NEXT
NEXT
BIT
BIT
Monitor ROM (MON)
$FEFC
Vector
$FFFC
High
SWI
3.)
$FEFD
Vector
$FFFD
Low
SWI
145

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