mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 224

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mc68hc08az60

Manufacturer Part Number
mc68hc08az60
Description
M68hc08 Family Of 8-bit Microcontroller Units Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Serial Peripheral Interface Module (SPI)
MC68HC08AZ60 — Rev 1.0
224
The first part of
clear the SPRF without problems. However, as illustrated by the second
transmission example, the OVRF flag can be set in between the time
that SPSCR and SPDR are read.
In this case, an overflow can be easily missed. Since no more SPRF
interrupts can be generated until this OVRF is serviced, it will not be
obvious that bytes are being lost as more transmissions are completed.
To prevent this, either enable the OVRF interrupt or do another read of
the SPSCR after the read of the SPDR. This ensures that the OVRF was
not set before the SPRF was cleared and that future transmissions will
complete with an SPRF interrupt.
Generally, to avoid this second SPSCR read, enable the OVRF to the
CPU by setting the ERRIE bit (SPSCR).
READ SPSCR
READ SPDR
Freescale Semiconductor, Inc.
For More Information On This Product,
OVRF
SPRF
Serial Peripheral Interface Module (SPI)
1
2
3
4
BYTE 1
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
BYTE 2 SETS SPRF BIT.
Figure 6. Missed Read of Overflow Condition
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1
Figure 6
2
3
shows how to read the SPSCR and SPDR to
BYTE 2
4
Figure 7
5
6
7
8
BYTE 3
5
CPU READS SPSCRW WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
CPU READS BYTE 2 IN SPDR, CLEARING SPRF BIT,
BUT NOT OVRF BIT.
BYTE 4 FAILS TO SET SPRF BIT BECAUSE
OVRF BIT IS SET. BYTE 4 IS LOST.
6
illustrates this process.
7
BYTE 4
8
MOTOROLA
14-spi

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