mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 227

no-image

mc68hc08az60

Manufacturer Part Number
mc68hc08az60
Description
M68hc08 Family Of 8-bit Microcontroller Units Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc68hc08az60 1J35D
Manufacturer:
FREESCALE
Quantity:
20 000
Interrupts
17-spi
MOTOROLA
NOTE:
bit does not clear the SPE bit or reset the SPI in any way. Software can
abort the SPI transmission by toggling the SPE bit of the slave.
A logic 1 voltage on the SS pin of a slave SPI puts the MISO pin in a high
impedance state. Also, the slave SPI ignores all incoming SPSCK
clocks, even if a transmission has begun.
To clear the MODF flag, read the SPSCR and then write to the SPCR
register. This entire clearing procedure must occur with no MODF
condition existing or else the flag will not be cleared.
Four SPI status flags can be enabled to generate CPU interrupt
requests:
The SPI transmitter interrupt enable bit (SPTIE) enables the SPTE flag
to generate transmitter CPU interrupt requests.
The SPI receiver interrupt enable bit (SPRIE) enables the SPRF bit to
generate receiver CPU interrupt, provided that the SPI is enabled
(SPE = 1).
The error interrupt enable bit (ERRIE) enables both the MODF and
OVRF flags to generate a receiver/error CPU interrupt request.
SPTE (Transmitter Empty)
SPRF (Receiver Full)
OVRF (Overflow)
MODF (Mode Fault)
Freescale Semiconductor, Inc.
For More Information On This Product,
Serial Peripheral Interface Module (SPI)
Flag
Go to: www.freescale.com
Table 4. SPI Interrupts
SPI Transmitter CPU Interrupt Request (SPTIE = 1)
SPI Receiver CPU Interrupt Request (SPRIE = 1)
SPI Receiver/Error Interrupt Request
SPI Receiver/Error Interrupt Request
(SPRIE = 1, ERRIE = 1)
(SPRIE = 1, ERRIE = 1, MODFEN = 1)
Serial Peripheral Interface Module (SPI)
Request
MC68HC08AZ60 — Rev 1.0
Interrupts
227

Related parts for mc68hc08az60