mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 207

• Manufacturer Part Number: mc68hc08az60
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

SCI Data Register
35-sci
MOTOROLA
Address:
BKF — Break Flag Bit
RPF — Reception in Progress Flag Bit
The SCI data register is the buffer between the internal data bus and the
receive and transmit shift registers. Reset has no effect on data in the
SCI data register.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This clearable, read-only bit is set when the SCI detects a break
character on the RxD pin. In SCS1, the FE and SCRF bits are also
set. In 9-bit character transmissions, the R8 bit in SCC3 is cleared.
BKF does not generate a CPU interrupt request. Clear BKF by
reading SCS2 with BKF set and then reading the SCDR. Once
cleared, BKF can become set again only after logic 1s again appear
on the RxD pin followed by another break character. Reset clears the
BKF bit.
This read-only bit is set when the receiver detects a logic 0 during the
RT1 time period of the start bit search. RPF does not generate an
interrupt request. RPF is reset after the receiver detects false start bits
(usually from noise or a baud rate mismatch), or when the receiver
detects an idle character. Polling RPF before disabling the SCI
module or entering stop mode can show whether a reception is in
progress.
Serial Communications Interface Module (SCI)
For More Information On This Product,
1 = Break character detected
0 = No break character detected
1 = Reception in progress
0 = No reception in progress
$0018
Bit 7
R7
T7
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Figure 17. SCI Data Register (SCDR)
R6
T6
6
R5
T5
5
Unaffected by Reset
Serial Communications Interface Module (SCI)
R4
T4
4
R3
T3
3
MC68HC08AZ60 — Rev 1.0
R2
T2
2
R1
T1
1
I/O Registers
Bit 0
R0
T0
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