isp1582 NXP Semiconductors, isp1582 Datasheet - Page 22

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isp1582

Manufacturer Part Number
isp1582
Description
Hi-speed Universal Serial Bus Peripheral Controller
Manufacturer
NXP Semiconductors
Datasheet

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8. Register description
Table 14.
ISP1582_6
Product data sheet
Name
Initialization registers
Address
Mode
Interrupt Configuration
OTG
Interrupt Enable
Data flow registers
Endpoint Index
Control Function
Data Port
Buffer Length
Buffer Status
Endpoint MaxPacketSize
Endpoint Type
DMA registers
DMA Command
DMA Transfer Counter
DMA Configuration
DMA Hardware
DMA Interrupt Reason
DMA Interrupt Enable
DMA Endpoint
DMA Burst Counter
Register overview
Destination
device
device
device
device
device
endpoints
endpoint
endpoint
endpoint
endpoint
endpoint
endpoint
DMA controller
DMA controller
DMA controller
DMA controller
DMA controller
DMA controller
DMA controller
DMA controller
Address Description
00h
0Ch
10h
12h
14h
2Ch
28h
20h
1Ch
1Eh
04h
08h
30h
34h
38h
3Ch
50h
54h
58h
64h
Rev. 06 — 20 September 2007
USB device address and enable
power-down options, global interrupt
enable, SoftConnect
interrupt sources, trigger mode, output
polarity
OTG implementation
interrupt source enabling
endpoint selection, data flow direction
endpoint buffer management
data access to endpoint FIFO
packet size counter
buffer status for each endpoint
maximum packet size
selects endpoint type: isochronous, bulk
or interrupt
controls all DMA transfers
sets byte count for DMA transfer
sets GDMA configuration (counter
enable, data strobing, bus width)
endian type, signal polarity for DACK,
DREQ, DIOW, DIOR, EOT
shows reason (source) for DMA interrupt 2
enables DMA interrupt sources
selects endpoint FIFO, data flow direction 1
DMA burst counter
Hi-Speed USB Peripheral Controller
Size
(bytes)
1
2
1
1
4
1
1
2
2
1
2
2
1
4
2
1
2
2
© NXP B.V. 2007. All rights reserved.
ISP1582
Reference
Section 8.2.1
on page 23
Section 8.2.2
on page 24
Section 8.2.3
on page 25
Section 8.2.4
on page 26
Section 8.2.5
on page 28
Section 8.3.1
on page 30
Section 8.3.2
on page 31
Section 8.3.3
on page 32
Section 8.3.4
on page 33
Section 8.3.5
on page 34
Section 8.3.6
on page 35
Section 8.3.7
on page 36
Section 8.4.1
on page 38
Section 8.4.2
on page 39
Section 8.4.3
on page 40
Section 8.4.4
on page 41
Section 8.4.5
on page 42
Section 8.4.6
on page 43
Section 8.4.7
on page 43
Section 8.4.8
on page 44
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