lan9313 Standard Microsystems Corp., lan9313 Datasheet - Page 369

• Manufacturer Part Number: lan9313
• Description: Lan9313/lan9313i Three Port 10/100 Managed Ethernet Switch With Mii
• Manufacturer: Standard Microsystems Corp.

Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
SMSC LAN9313/LAN9313i
13.3.4.13
31:22
BITS
21
20
19
18
RESERVED
Insert Tag Port 2
When set, untagged packets will have a tag added that contains the Default
VLAN ID and Priority of the ingress port.
The un-tag bit in the VLAN table for the default VLAN ID also needs to be
cleared in order for the tag to be inserted.
This is only used when the Egress Port Type is set as Hybrid.
Change VLAN ID Port 2
When set, regular tagged packets will have their VLAN ID overwritten with
the Default VLAN ID of the egress port.
The Change Tag bit also needs to be set.
The un-tag bit in the VLAN table for the incoming VLAN ID also needs to be
cleared, otherwise the tag will be removed instead.
Priority tagged packets will have VLAN ID overwritten with the Default VLAN
ID of the ingress port independent of this bit.
This is only used when the Egress Port Type is set as Hybrid.
Change Priority Port 2
When set, regular tagged packets will have their Priority overwritten with the
Default Priority of the egress port. Priority tagged packets will have VLAN ID
overwritten with the Default VLAN ID of the ingress port.
For regular tagged packets, the Change Tag bit also needs to be set.
The un-tag bit in the VLAN table for the incoming VLAN ID also needs to be
cleared, otherwise the tag would be removed instead.
This is only used when the Egress Port Type is set as Hybrid.
Change Tag Port 2
When set, allows the Change Tag and Change Priority bits to affect regular
tagged packets.
This bit has no affect on priority tagged packets.
This is only used when the Egress Port Type is set as Hybrid.
Buffer Manager Egress Port Type Register (BM_EGRSS_PORT_TYPE)
This register is used to configure the egress VLAN tagging rules. See
Removing, and Changing VLAN Tags," on page 80
Register #:
1C0Ch
DESCRIPTION
DATASHEET
369
Size:
for additional details.
32 bits
Section 6.5.6, "Adding,
TYPE
R/W
R/W
R/W
R/W
RO
Revision 1.2 (04-08-08)
DEFAULT
0b
0b
0b
0b
-