aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 114
aduc7030
Manufacturer Part Number
aduc7030
Description
Integrated Precision Battery Sensor For Automotive
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7030.pdf
(150 pages)
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ADuC7030/ADuC7033
High Voltage Status Register:
Name:
Address:
Default Value:
Access:
Function:
Table 71. HVSTA Bit Designations
Bit
7-6
5
4
3
2
1
0
Description
Reserved
These bits should not be used and are reserved for future use.
PSM Status Bit (Only valid If enabled via HVCFG0[3])
This bit is 0 if the voltage at the VDD pin stays above 6.0V
This bit will be 1 if the voltage at the VDD pin drops below 6.0V.
Please note that this bit is not latched and the IRQ needs to be enabled to detect it.
WU Request Status Bit (Only valid If enabled via HVCFG1[4])
Once enabled via HVCFG1[4], this bit will be set to 1 to indicate that a rising or falling edge transition on the WU pin generated a
high voltage interrupt.
Over Temperature (Always enabled)
This bit will be 0 if a thermal shutdown event has not occurred.
This bit will be 1 if a thermal shutdown event has occurred. All high voltage (LIN/BSD, WU & STI) pin drivers will be automatically
disabled once a thermal shutdown has occurred.
LIN/BSD Short Circuit Status Flag
This bit will be 0 during normal LIN/BSD operation and is cleared automatically by reading the HVSTA register.
This bit will be 1 if a LIN/BSD short circuit is detected. In this condition, the LIN driver will be automatically disabled.
STI Short Circuit Status Flag:
This bit will be 0 if the STI driver is operating normally and is cleared automatically by reading the HVSTA register.
This bit will be 1 if the STI driver has experienced a short circuit condition.
Wake Short Circuit Status Flag
This bit will be 0 during normal Wake operation
This bit will be 1 if a Wake short circuit is detected.
HVSTA
Indirectly addressed via the HVCON high voltage interface
0x00
Read Only. This register should only be read on a high voltage interrupt.
This 8-bit read only register reflects a change of state of all the corresponding bit in the HVMON register. This register
is not an MMR and does not appear in the MMR memory map. It is accessed via the HVCON registered interface, and
data is read back from this register via HVDAT. It should be noted that in response to a high voltage interrupt event,
the high voltage interrupt controller simultaneously and automatically loads the current value of the high voltage
Status register (HVSTA) into the HVDAT register.
Rev. PrE | Page 114 of 150
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