aduc7030 Analog Devices, Inc., aduc7030 Datasheet - Page 55
aduc7030
Manufacturer Part Number
aduc7030
Description
Integrated Precision Battery Sensor For Automotive
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7030.pdf
(150 pages)
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Preliminary Technical Data
ADC Interrupt Mask Register:
Name:
Address:
Default Value:
Access:
Function:
ADC Mode Register:
Name:
Address:
Default Value:
Access:
Function:
Table 29. ADCMDE MMR Bit Designations
Bit
7
6
5
4-3
2-0
Description
Not Used
This bit is reserved for future functionality and be written as 0 by user code
20K: resistor select:
This bit is set to 1 to select the 20 K: resistor as shown in Figure 18
This bit is set to 0 to select the direct path to ground as shown in Figure 18 (Default).
Low Power Mode Reference Select:
This bit is set to 1 to enable the Precision Voltage Reference in either Low Power Mode or Low Power Plus Mode. This will increase
current consumption.
This bit is set to 0 to enable the Low Power Voltage Reference in either Low Power Mode or Low Power Plus Mode (Default).
ADC Power Mode Configuration
0, 0
0, 1
1, 0
1, 1
ADC Operation Mode Configuration
0, 0, 0
0, 0, 1
0, 1, 0
0, 1, 1
1, 0, 0
ADC Normal Mode
If enabled, the ADC will operate with normal current consumption yielding optimum electrical performance
ADC Low Power Mode
If enabled, the I-ADC will operate with reduced current consumption. This limitation is current consumption is
achieved, (at the expense of ADC noise performance) by fixing the gain to 128 and using the on-chip low power
(131kHz) oscillator to drive the ADC circuits directly.
ADC Low Power-Plus Mode
If enabled, the ADC will again operate with reduced current consumption. In this mode, the gain is fixed to 512 and the
current consumed is 200uA (approx.) more than ADC low Power Mode above. The additional current consumed also
ensures ADC noise performance is better than that achieved in ADC Low Power Mode.
Not Defined
ADC Power-Down Mode
All ADC circuits (including internal reference) are powered-down
ADC Continuous Conversion Mode
In this mode, any enabled ADC will continuously convert.
ADC Single Conversion Mode
In this mode, any enabled ADC will perform a single conversion. The ADC will enter Idle Mode once the single
shot conversion is complete. A single conversion will take 2/3 ADC clock cycles depending on the CHOP mode.
ADC IDLE Mode
In this Mode, the ADC is fully powered on but is held in RESET
ADC Self-Offset Calibration
In this mode, an offset calibration is performed on any enabled ADC using an internally generated 0V. The calibration is
carried out at the user programmed ADC settings, therefore, as with a normal single ADC conversion, it will take 2/3 ADC
conversion cycles before a fully settled calibration result is ready. The calibration result is automatically written to the
ADCMSKI
0xFFFF0504
0x00
Read/Write
This register allows the ADC interrupt sources to be enabled individually. The bits position in this register are the
same as the lower 8-bits in the ADCSTA MMR. If a bit is set by user code to a ‘1’ , the respective interrupt is enabled. By
default all bits are ‘0’ meaning all ADC interrupt sources are disabled.
ADCMDE
0xFFFF0508
0x00
Read/Write
The ADC Mode MMR is an 8-bit register that configures the mode of operation of the ADC sub-system.
Rev. PrE | Page 55 of 150
ADuC7030/ADuC7033
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