sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 136
![no-image](/images/no-image-200.jpg)
sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
- Current page: 136 of 266
- Download datasheet (4Mb)
MCMOUTH
Multi-Channel Mode Output Register ,High Byte
Field
EXPH
CURH
-
1)
User’s Manual
The bits in the bit fields EXPH and CURH correspond to the hall patterns at the input pins CCPOSx (x=0, 1, 2)
in the order (EXPH.2, EXPH.1, EXPH.0), (CURH.2, CURH.1, CURH.0), (CCPOS2, CCPOS.1, CCPOS0).
7
-
r
1)
6
-
r
Bits
[2:0]
[5:3]
[7:6]
5
Type Description
rh
rh
r
Expected Hall Pattern
Bitfield EXPH is written by a shadow transfer from
bitfield EXPHS. The contents is compared after
every detected edge at the hall input pins with the
pattern at the hall input pins in order to detect the
occurrence of the next desired (=expected) hall
pattern or a wrong pattern.
If the current hall pattern at the hall input pins is equal
to the bitfield EXPH, bit CHE (correct hall event) is
set and an interrupt request is generated (if enabled
by bit ENCHE).
If the current hall pattern at the hall input pins is not
equal to the bitfields CURH or EXPH, bit WHE
(wrong hall event) is set and an interrupt request is
generated (if enabled by bit ENWHE).
Current Hall Pattern
Bitfield CURH is written by a shadow transfer from
bitfield CURHS.The contents is compared after
every detected edge at the hall input pins with the
pattern at the hall input pins in order to detect the
occurrence of the next desired (=expected) hall
pattern or a wrong pattern.
If the current hall input pattern is equal to bitfield
CURH, the detected edge at the hall input pins has
been an invalid transition (e.g. a spike).
reserved;
returns ’0’ if read; should be written with ’0’;
CURH
rw
4
4-92
3
On-Chip Peripheral Components
2
[Reset value: 00
EXPH
rw
1
V 1.0, 2003-01
C868
0
H
]
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