sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 33
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sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
- Current page: 33 of 266
- Download datasheet (4Mb)
3.4
All registers, except the program counter and the four general purpose register banks,
reside in the special function register area. The special function register area consists
of two portions: the standard special function register area and the mapped special
function register area. For accessing the mapped special function area, bit RMAP in
special function register SYSCON0 must be set. All other special function registers are
located in the standard special function register area which is accessed when RMAP is
cleared (“0“).
SYSCON0
System Control Register 0
Field
RMAP
-
As long as bit RMAP is set, the mapped special function register area can be accessed.
This bit is not cleared automatically by hardware. Thus, when non-mapped/mapped
registers are to be accessed, the bit RMAP must be cleared/set respectively by software.
The special function registers (SFR) include pointers and registers that provide an
interface between the CPU and the other on-chip peripherals. All available SFRs whose
address bits 0-2 are 0 (e.g. 80
there are directly addressable bits within the SFR area.
All SFRs are listed in
In
C868-1R, C868-1S.
User’s Manual
Table 3-6
7
-
r
Special Function Registers
they are organized in groups which refer to the functional blocks of the
The functions of the shaded bits are not described here
6
-
r
Bits
4
[7:2]
Table 3-7
Table 3-6
EALE
rw
5
Typ Description
rw
r
H
illustrates the contents (bits) of the SFRs
and
, 88
Special Function Register Map Control
RMAP = 0 : The access to the non-mapped (standard)
RMAP = 1 : The access to the mapped special function
reserved;
returns ’0’ if read; should be written with ’0’;
RMAP
H
Table
rw
, 90
4
H
3-9
, ..., F0
3-7.
special function register area is enabled.
register area is enabled.
3
-
r
H
, F8
H
) are bit- addressable. Totally
[Reset value: XX10XXX1
2
-
r
Memory Organization
1
-
r
V 1.0, 2003-01
XMAP0
rw
C868
0
B
]
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