sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 87
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sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
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DTM. This reload can only take place if the dead-time feature is enabled by bit DTEx and
while the counter is zero.
While counting down (zero is not yet reached), the output line DTCx_o becomes ’0’. This
output line is combined with the T12 modulation signals, leading to a delay of the passive
to active edge of the resulting signal, which is shown in
counter value zero, the dead-time counter stops counting and the signal DTCx_o
becomes ’1’. The dead-time counter can not be reloaded while it is counting.
Figure 4-22
Each of the three channels works independently with its own dead-time counter and the
trigger and enable signals. The value of bit field DTM is valid for all of the three channels.
In the Hall sensor mode, timer T12 is used to measure the rotational speed of the motor
(channel 0 in capture mode) and to control the phase delay before switching to the next
state (channel 1 in compare mode). Furthermore, channel 2 can be used to generate a
time-out signal (in compare mode). As a result, T12 can not be used for modulation and,
due to the block commutation patterns, a dead-time generation is not required. In order
to built an efficient noise filter for the Hall signals, channel 0 of the dead-time unit is
triggered (reloaded) with each detected edge of the Hall signals, see signal Hall_edge_o
in
one.
4.7.1.9
In capture mode the bits CC6xST indicate the occurrence of the selected capture event
according to the bit fields MSEL6x. A rising and/or a falling edge on the pins CC6x can
User’s Manual
Figure
DTC0_rl
4-17. For this feature, channel 0 also generates a pulse if its counter value is
Capture Mode
DTE0
Dead-time Counter
T12clk
DTC1_rl
N
D
A
DTC2_rl
down-counter
6 bit
6
=0
4-43
(channel 0 only)
channel 0
DTC0_1o
=1
DTC0_o
DTM
6
On-Chip Peripheral Components
Figure
channel 1
DTC1_o
6
4-21. When reaching the
channel 2
DTC2_o
V 1.0, 2003-01
C868
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