tea1202ts NXP Semiconductors, tea1202ts Datasheet - Page 7

• Manufacturer Part Number: tea1202ts
• Description: Battery Power Unit
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7
8
8.1
The DC-to-DC converter of the TEA1202TS is able to
operate in PFM (discontinuous conduction) or PWM
(continuous conduction) operating mode. All switching
actions are completely determined by a digital control
circuit which uses the output voltage level as its control
input. This novel digital approach enables the use of a new
pulse width and frequency modulation scheme, which
ensures optimum power efficiency over the complete
range of operation of the converter.
When high output power is requested, the device will
operate in PWM (continuous conduction) operating mode.
This results in minimum AC currents in the circuit
components and hence optimum efficiency, minimum
costs and low EMC. In this operating mode, the output
voltage is allowed to vary between two predefined voltage
levels. As long as the output voltage stays within this
so-called window, switching continues in a fixed pattern.
2002 Mar 14
LX1
SHDWN0
SHDWN2
UPOUT/DNIN
ILIM
OUT1
FB1
GND
FB2
OUT2
IN2
LBI2
LBI1
LBO
V
FB0
GND0
SYNC/PWM
U/D
LX2
ref
0.95 V starting power unit
SYMBOL
PINNING
FUNCTIONAL DESCRIPTION
Control mechanism
PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
inductor connection 1
DC-to-DC shut-down input
LDO2 shut-down input
up mode DC-to-DC output;
down mode DC-to-DC input
current limiting resistor
connection
LDO1 output
LDO1 feedback input
internal supply ground
LDO2 feedback input
LDO2 output
LDO2 input
low battery detector input 2
low battery detector input 1
low battery detector output
reference voltage
DC-to-DC feedback input
DC-to-DC converter ground
synchronization clock input or
PWM-only selection input
conversion mode selection input
inductor connection 2
DESCRIPTION
7
When the output voltage reaches one of the window
borders, the digital controller immediately reacts by
adjusting the pulse width and inserting a current step in
such a way that the output voltage stays within the window
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the response of the converter to a sudden load
increase. The upper trace shows the output voltage.
The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the internal Equivalent Series Resistance
(ESR) of the capacitor. After each ramp-down of the
inductor current, i.e. when the ESR effect increases the
output voltage, the converter determines what to do in the
next cycle. As soon as more load current is taken from the
output the output voltage starts to decay.
handbook, halfpage
UPOUT/DNIN
SHDWN0
SHDWN2
OUT1
OUT2
GND
ILIM
LX1
FB1
FB2
Fig.2 Pin configuration.
10
1
2
3
4
5
6
7
8
9
TEA1202TS
MGU060
Preliminary specification
20
19
18
17
16
15
14
13
12
11
TEA1202TS
LX2
U/D
SYNC/PWM
GND0
FB0
V ref
LBO
LBI1
LBI2
IN2