lm4935rlx National Semiconductor Corporation, lm4935rlx Datasheet - Page 22

• Manufacturer Part Number: lm4935rlx
• Description: Audio Sub-system With Dual-mode Stereo Headphone And Mono High Efficiency Loudspeaker Amplifiers And Multi-purpose Adc
• Manufacturer: National Semiconductor Corporation

www.national.com
Bits
12.0 Status & Control Registers
12.1 BASIC CONFIGURATION REGISTER
This register is used to control the basic function of the chip.
For reliable headset / push button detection the following bits should be defined before enabling the headset detection system by
setting bit 0 of CHIP_MODE:
The OCL-bit (Cap / Capless headphone interface; bit 7 of this register)
The headset insert/removal debounce settings (bits 6:3 of DETECT (0x17h))
The BTN_TYPE-bit (Parallel / Series push button type; bit 3 MIC_2 register (0x0Ch))
The parallel push button debounce settings (bits 5:4 of MIC_2 register (0x0Ch))
All register fields controlling the audio system should be defined before setting bit 1 of CHIP_MODE and should not be altered
while the audio sub-system is active.
If the analog or digital levels are below −12 dB then it is not necessary to set the stereo bit allowing greater output levels to be
obtained for such signals.
1:0
5:4
2
3
6
7
PLL_ENABLE
CHIP_MODE
USE_OSC
CAP_SIZE
STEREO
Field
OCL
The LM4935 can be placed in one of four modes which dictate its basic operation. When a new
mode is selected the LM4935 will change operation silently and will re-configure the power
management profile automatically. The modes are described as follows:
If set the PLL can be used.
If set the power management and control circuits will assume that no external clock is available and
will resort to using an on-chip oscillator for SAR, headset detection and analog power management
functions such as click and pop.
Programs the extra delays required to stabilize once charge/discharge is complete, based on the size
of the bypass capacitor.
If set, the mixers assume that the signals on the left and right internal busses are highly correlated
and when these signals are combined their levels are reduced by 6 dB to allow enough headroom for
them to be summed at the Loudspeaker, Earpiece, CPOUT, and AUXOUT amplifiers. For the
Headphone amplifier, if this bit is set, the left and right signal levels are routed to the corresponding
left or right headphone output; if this bit is cleared, the left and the right signals are added and routed
to both headphone outputs and their levels are reduced by 6dB to allow enough headroom.
If set the part is placed in OCL (Output Capacitor Less) mode.
CHIP MODE
CAP_SIZE
00
01
10
00
01
10
11
11
2
2
2
2
2
2
2
2
Audio System
TABLE 2. BASIC (0x00h)
Off
Off
On
On
Bypass Capacitor Size
(Continued)
0.1 µF
2.2 µF
4.7 µF
1 µF
22
Detection System
Description
On
On
Off
Off
Active without headset event detection
Active with headset event detection
Stand-by mode with headset event
Power-down Mode
Typical Application
Turn-off/on time
45 ms/140 ms
45 ms/260 ms
45 ms/500 ms
45 ms/75 ms
detection