lm4935rlx National Semiconductor Corporation, lm4935rlx Datasheet - Page 28

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lm4935rlx

Manufacturer Part Number
lm4935rlx
Description
Audio Sub-system With Dual-mode Stereo Headphone And Mono High Efficiency Loudspeaker Amplifiers And Multi-purpose Adc
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Bits
12.0 Status & Control Registers
12.7 PLL P DIVIDER CONFIGURATION REGISTER
This register is used to control the output divider of the PLL.
The division of the P divider is derived from PLL_P such that:
Note 13: See Further Notes on PLL Programming for more details.
3:1
6:4
0
7
PLL_P
Q_DIV
RSVD
RSVD
Field
RESERVED
Programs the Q Divider (divides from an expected 12.000 MHz input).
RESERVED
PLL_P
Q_DIV
000
001
010
100
101
000
001
010
100
101
TABLE 8. PLL_P (0x04h)
011
110
111
011
110
111
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
(Continued)
P = PLL_P + 1
28
Description
Output Divider Value
Divide Value
10
12
13
1
2
3
4
5
6
7
8
2
3
4
6
8

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