lm4935rlx National Semiconductor Corporation, lm4935rlx Datasheet - Page 27

• Manufacturer Part Number: lm4935rlx
• Description: Audio Sub-system With Dual-mode Stereo Headphone And Mono High Efficiency Loudspeaker Amplifiers And Multi-purpose Adc
• Manufacturer: National Semiconductor Corporation

Bits
12.0 Status & Control Registers
12.6 PLL N DIVIDER CONFIGURATION REGISTER
This register is used to control the feedback divider of the PLL.
The N divider should be set such that the output of the divider is between 0.5 MHz and 5 MHz. (Fin/M)*N will be the target resting
VCO frequency, F
(comparison frequency) or F
The integer division of the N divider is derived from PLL_N such that:
Note 12: See Further Notes on PLL Programming for further details.
7:0
PLL_N
Field
VCO
. The N divider should be set such that 40 MHz
Programs the PLL feedback divider as follows:
ref
(reference frequency), in this document F
For 9
250 to 255
0 to 10
PLL_N
TABLE 7. PLL_N (0x03h)
249
11
12
13
14
…
<
PLL_N
(Continued)
<
27
251: N = PLL_N
<
(Fin/M)*N
Description
comp
is used.
<
60 MHz. Fin/M is often referred to as F
Feedback Divider Value
249
250
10
12
13
14
11
…
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comp