lm4935rlx National Semiconductor Corporation, lm4935rlx Datasheet - Page 33

• Manufacturer Part Number: lm4935rlx
• Description: Audio Sub-system With Dual-mode Stereo Headphone And Mono High Efficiency Loudspeaker Amplifiers And Multi-purpose Adc
• Manufacturer: National Semiconductor Corporation

Bits
5:3
12.0 Status & Control Registers
12.11 ADC_2 CONFIGURATION REGISTER
This register is used to control the LM4935’s audio ADC.
Note 15: Refer to the AGC overview for further detail.
0
1
2
6
7
AGC_FRAME_TIME
AUDIO_IF_2_16BIT
ULAW/ALAW
ADC_I2S_M
ADC_MUTE
COMPAND
Field
If COMPAND is set then the data across the PCM interface to the DAC and from the ADC is
companded as follows:
If set the 16 bit PCM data from the ADC is companded before the PCM interface and the PCM
data to the DAC is treated as companded data.
If set the analog inputs to the ADC are muted.
This sets the frame time to be used by the AGC algorithm. In a given frame, the AGC’s peak
detector determines the peak value of the incoming microphone audio signal and compares this
value to the target value of the AGC defined by AGC_TARGET (bits [3:1] of register (0x08h)) in
order to adjust the microphone preamplifiers gain accordingly. AGC_FRAME_TIME basically sets
the sample rate of the AGC to adjust for a wide variety of speech patterns. (Note 15)
If set the DAC clock system is enabled to drive the I2S in master mode. The Point B frequency
should be double that at Point C. This bit should be set when using the I2S interface in master
mode to read SAR information whenever both the audio ADC and DAC are inactive.
If set the PCM and I2S interfaces are 16 bits per word in master mode. The 2 last clock cycles per
word are 25% shorter to allow generation.
AGC_FRAME_TIME
ULAW/ALAW
TABLE 12. ADC_2 (0x07h)
000
001
010
011
100
101
110
111
0
1
2
2
2
2
2
2
2
2
(Continued)
33
Description
Commanding Type
Time (ms)
A-law
µ-law
1000
128
192
256
384
512
768
96
www.national.com