psd813f2v STMicroelectronics, psd813f2v Datasheet - Page 60

• Manufacturer Part Number: psd813f2v
• Description: Flash In-system Programmable Isp Peripherals For8-bits Mcus, 3v
• Manufacturer: STMicroelectronics

PSD813F2V, PSD854F2V
Port D – Functionality and Structure
Port D has three I/O pins. See Figure
ure 31., page
dress Out mode, and therefore no Control
Register is required. Port D can be configured to
perform one or more of the following functions:
■
■
■
Figure 30. Port D Structure
60/109
MCU I/O Mode
CPLD Output – External Chip Select (ECS0-
ECS2)
CPLD Input – direct input to the CPLD, no
Input Macrocells (IMC)
61. This port does not support Ad-
ECS [ 2:0 ]
WR
WR
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
30
Doc ID 10552 Rev 3
and
Fig-
DATA OUT
DATA IN
■
Port D pins can be configured in PSDsoft Express
as input pins for other dedicated functions:
■
■
■
CPLD-INPUT
Slew rate – pins can be set up for fast slew
rate
Address Strobe (ALE/AS, PD0)
CLKIN (PD1) as input to the macrocells flip-
flops and APD counter
PSD Chip Select Input (CSI, PD2). Driving this
signal High disables the Flash memory, SRAM
and CSIOP.
OUTPUT
OUTPUT
SELECT
MUX
ENABLE PRODUCT
TERM (.OE)
PORT D PIN
AI02889